Modeling of CMOS Devices and Circuits on Flexible Ultrathin Chips

IEEE Transactions on Electron Devices

Volumn 64, Issue 5, 2017, Pages 2038-2046

  Vilouras, Anastasios ^a   Heidari, Hadi ^a   Gupta, Shoubhik ^a   Dahiya, Ravinder ^a  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

Author keywords

CAD; CMOS; Device modeling; Flexible electronics; Thinning Down techniques; Ultrathin silicon

Indexed keywords

CARRIER MOBILITY; CHIP SCALE PACKAGES; CMOS INTEGRATED CIRCUITS; ELECTRIC INVERTERS; FIELD EFFECT TRANSISTORS; TENSILE STRESS; THRESHOLD VOLTAGE; TIMING CIRCUITS;

COMPRESSIVE AND TENSILE STRESS; ELECTRICAL CHARACTERIZATION; FLEXIBLE SUBSTRATE; MATHEMATICAL EQUATIONS; MOBILITY VARIATION; PERFORMANCE REQUIREMENTS; SWITCHING THRESHOLD VOLTAGE; TENSILE BENDING STRESS;

FLEXIBLE ELECTRONICS;

EID: 85014190906     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2017.2668899     Document Type: Article

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