Modeling cache performance beyond LRU

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn 2016-April, Issue , 2016, Pages 225-236

  Beckmann, Nathan ^a   Sanchez, Daniel ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; FORECASTING; QUALITY OF SERVICE; SUPERCOMPUTERS;

ACCURATE PREDICTION; AGE-BASED REPLACEMENT; CACHE PARTITIONING; CACHE REPLACEMENT POLICY; LEAST RECENTLY USED; MODERN PROCESSORS; MULTI-CORE SYSTEMS; REPLACEMENT POLICY;

BENCHMARKING;

EID: 84965025544     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2016.7446067     Document Type: Conference Paper

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