A framework for providing quality of service in chip multi-processors

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2007, Pages 343-355

  Guo, Fei ^a   Solihin, Yan ^a   Zhao, Li ^b   Iyer, Ravishankar ^b  

^a North Carolina State University

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADMISSION CONTROL POLICIES; ENTERPRISE IT; FULL SYSTEM SIMULATIONS; IN-CHIP; INTERNATIONAL SYMPOSIUM; LINUX OPERATING SYSTEM; MICRO ARCHITECTURES; OFF CHIP; PERFORMANCE QUALITY; QOS FRAMEWORK; SERVER CONSOLIDATION; SERVICE ORIENTED COMPUTING; SIGNIFICANT REDUCTION; SOFTWARE SUPPORT; THROUGHPUT OPTIMIZATION; VIRTUAL COMPUTING;

COMPUTER OPERATING SYSTEMS; ENERGY MANAGEMENT; NANOTECHNOLOGY; QUALITY CONTROL; TARGETS; THROUGHPUT; VIRTUAL REALITY;

QUALITY OF SERVICE;

EID: 47349085427     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2007.17     Document Type: Conference Paper

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