Improving cache management policies using dynamic reuse distances

Proceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012

Volumn , Issue , 2012, Pages 389-400

  Duong, Nam ^a   Zhao, Dali ^a   Kim, Taesu ^a   Cammarota, Rosario ^a   Valero, Mateo ^b   Veidenbaum, Alexander V ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b BARCELONA SUPERCOMPUTING CENTER   (Spain)

Author keywords

bypass policy; cache management; cache pollution; hit rate model; partitioning policy; protecting distance; replacement policy; reuse distance distribution

Indexed keywords

BYPASS POLICIES; CACHE MANAGEMENT; CACHE POLLUTION; HIT RATE; PROTECTING DISTANCES; REPLACEMENT POLICY; REUSE DISTANCE;

CACHE MEMORY; COMPUTER ARCHITECTURE;

MICROPROCESSOR CHIPS;

EID: 84876561848     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2012.43     Document Type: Conference Paper

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