Decoupled dynamic cache segmentation

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2012, Pages 235-246

  Khan, Samira M ^a   Wang, Zhe ^a   Jimenez, Daniel A ^a  

^a University of Texas at San Antonio   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE ACCESS; DYNAMIC CACHE; FOUR-CORE; LEAST RECENTLY USED; MEMORY ACCESS; REPLACEMENT POLICY; SECOND LEVEL; SEGMENTATION TECHNIQUES; SHARED CACHE; SINGLE-CORE PROCESSORS; TEMPORAL LOCALITY;

COMPUTER ARCHITECTURE; SUPERCOMPUTERS;

CACHE MEMORY;

EID: 84860345663     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2012.6169030     Document Type: Conference Paper

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