Sampling dead block prediction for last-level caches

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2010, Pages 175-186

  Khan, Samira ^a   Tian, Yingying ^a   Jiménez, Daniel A ^a,b  

^a University of Texas at San Antonio   (United States)

^b BARCELONA SUPERCOMPUTING CENTER   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BLOCK REPLACEMENT; CACHE BLOCKS; DYNAMIC POWER; GEOMETRIC MEAN; IMPROVE-A; LARGE STRUCTURES; LEAKAGE POWER; MULTI CORE; POWER REQUIREMENT; PROGRAM COUNTERS; REDUCED-STATE; REPLACEMENT POLICY;

FORECASTING;

EID: 79951697650     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2010.24     Document Type: Conference Paper

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