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Volumn 52, Issue 11, 2012, Pages 2660-2669

Effects of TSVs (through-silicon vias) on thermal performances of 3D IC integration system-in-package (SiP)

Author keywords

[No Author keywords available]

Indexed keywords

3D STACKING; DESIGN CHARTS; ENGINEERING PRACTICES; HOTSPOT TEMPERATURE; JUNCTION TEMPERATURES; MEMORY CHIPS; SYSTEM-IN-PACKAGE; THERMAL PERFORMANCE; THROUGH SILICON VIAS; THROUGH-SILICON-VIA;

EID: 84867577279     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2012.04.002     Document Type: Article
Times cited : (77)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.