Nonlinear thermal stress/strain analyses of copper filled TSV (Through Silicon Via) and their flip-chip microbumps

IEEE Transactions on Advanced Packaging

Volumn 32, Issue 4, 2009, Pages 720-728

  Selvanayagam, Cheryl S ^a   Lau, John H ^a   Zhang, Xiaowu ^a   Seah, S K W ^a   Vaidyanathan, Kripesh ^a   Chai, T C ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

Copper; Modeling; Strain; Stress

Indexed keywords

BISMALEIMIDES; COEFFICIENT OF THERMAL EXPANSION; FLIP CHIP; MICRO-BUMPS; MODELING; NONLINEAR STRESS; SILICON CHIP; SILICON SUBSTRATES; SILICON THICKNESS; STRESS/STRAIN; TEMPERATURE CONDITIONS; TEMPERATURE LOADINGS; THERMAL CONDITION; THERMAL EXPANSION MISMATCH; THROUGH-SILICON-VIA; UNDERFILL MATERIALS; UNDERFILLS;

ASPECT RATIO; COPPER; ELASTICITY; SILICON COMPOUNDS; SILICON OXIDES; STRAIN; STRUCTURAL DESIGN; SUBSTRATES; THERMAL STRESS; TUNGSTEN;

THERMAL EXPANSION;

EID: 74649084751     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2009.2021661     Document Type: Article

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