-
1
-
-
61549131161
-
3-D hyperintegration and packaging technologies for micro-nano systems
-
Jan.
-
J.-Q. Lu, "3-D hyperintegration and packaging technologies for micro-nano systems", Proceeding of the IEEE, vol. 97, no. 1, pp. 18-30, Jan. 2009.
-
(2009)
Proceeding of the IEEE
, vol.97
, Issue.1
, pp. 18-30
-
-
Lu, J.-Q.1
-
2
-
-
61649110276
-
Three-dimentional silicon integration
-
Nov.
-
J.U. Knickerbocker, P.S. Andry, B. Dang, R.R. Horton, M.J. Interrante, C.S. Patel, R.J. Polastre, K. Sakuma, R. Sirdeshmukh, E.J. Sprogis, S.M. Sri-Jayantha, A.M. Stephens, A.W. Topol, C.K. Tsang, B.C. Webb, and S.L. Wright, "Three-dimentional silicon integration", IBM Journal of Research and Development, vol. 52, no. 6, pp. 537-664, Nov. 2008.
-
(2008)
IBM Journal of Research and Development
, vol.52
, Issue.6
, pp. 537-664
-
-
Knickerbocker, J.U.1
Andry, P.S.2
Dang, B.3
Horton, R.R.4
Interrante, M.J.5
Patel, C.S.6
Polastre, R.J.7
Sakuma, K.8
Sirdeshmukh, R.9
Sprogis, E.J.10
Sri-Jayantha, S.M.11
Stephens, A.M.12
Topol, A.W.13
Tsang, C.K.14
Webb, B.C.15
Wright, S.L.16
-
3
-
-
80052028414
-
Through-strata-via (TSV) parasitics and broadband modeling for 3D integration/packaging
-
Sept.
-
Z. Xu, and J.-Q. Lu, "Through-strata-via (TSV) parasitics and broadband modeling for 3D integration/packaging", IEEE Electron Device Letters, vol. 32, no. 9, pp. 1278-1280, Sept. 2011.
-
(2011)
IEEE Electron Device Letters
, vol.32
, Issue.9
, pp. 1278-1280
-
-
Xu, Z.1
Lu, J.-Q.2
-
5
-
-
80052032494
-
High-speed design and broadband modeling of through-strata-vias (TSVs) in 3D integration
-
Feb.
-
Z. Xu, and J.-Q. Lu, "High-speed design and broadband modeling of through-strata-vias (TSVs) in 3D integration", IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 1, no. 2, pp. 154-162, Feb. 2011.
-
(2011)
IEEE Transactions on Components, Packaging and Manufacturing Technology
, vol.1
, Issue.2
, pp. 154-162
-
-
Xu, Z.1
Lu, J.-Q.2
-
7
-
-
79960894955
-
Electrical performance and alignment investigation of wafer-level Cu-oxide hybrid bonding schemes
-
Aug.
-
K.-N. Chen, Z. Xu, J.-Q. Lu, "Electrical performance and alignment investigation of wafer-level Cu-oxide hybrid bonding schemes", IEEE Electron Device Letters, vol. 32, no. 8, pp. 1119-1121, Aug. 2011.
-
(2011)
IEEE Electron Device Letters
, vol.32
, Issue.8
, pp. 1119-1121
-
-
Chen, K.-N.1
Xu, Z.2
Lu, J.-Q.3
-
9
-
-
61549106848
-
3-D technology assessment path-finding the technology design sweet spot
-
Jan.
-
P. Marchal, B. Bougard, G. Katti, M. Stucchi, W. Dehaene, A. Papanikolaou, D. Verkest, B. Swinnen, and E. Beyne, "3-D technology assessment path-finding the technology design sweet spot", Proceeding of the IEEE, vol. 97, no. 1, pp. 96-107, Jan. 2009.
-
(2009)
Proceeding of the IEEE
, vol.97
, Issue.1
, pp. 96-107
-
-
Marchal, P.1
Bougard, B.2
Katti, G.3
Stucchi, M.4
Dehaene, W.5
Papanikolaou, A.6
Verkest, D.7
Swinnen, B.8
Beyne, E.9
-
10
-
-
70549095281
-
Modeling and evaluation for electrical characteristics of through-strata-vias (TSVs) in three-dimensional integration
-
Z. Xu, A. Beece, T. Zhang, K. Rose, and J.-Q. Lu, "Modeling and evaluation for electrical characteristics of through-strata-vias (TSVs) in three-dimensional integration", IEEE International Conference on 3D System Integration (3D IC), San Francisco, CA, Sept. 2009.
-
IEEE International Conference on 3D System Integration (3D IC), San Francisco, CA, Sept. 2009
-
-
Xu, Z.1
Beece, A.2
Zhang, T.3
Rose, K.4
Lu, J.-Q.5
-
12
-
-
0242443414
-
The evolution of monolithic and polylithic interconnect technology
-
J.D. Meindl, "The evolution of monolithic and polylithic interconnect technology", IEEE Symposium on VLSI Circuits, Honolulu, HI, pp. 2-5, 2002.
-
(2002)
IEEE Symposium on VLSI Circuits, Honolulu, HI
, pp. 2-5
-
-
Meindl, J.D.1
-
13
-
-
78650950340
-
Characterization and modeling of solder balls and through-strata-vias (TSVs) in 3D architecture
-
Z. Xu, A. Beece, D. Zhang, Q. Chen, K. Rose, and J.- Q. Lu, "Characterization and modeling of solder balls and through-strata-vias (TSVs) in 3D architecture", IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Austin, TX, Oct. 2010.
-
IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Austin, TX, Oct. 2010
-
-
Xu, Z.1
Beece, A.2
Zhang, D.3
Chen, Q.4
Rose, K.5
Lu, J.Q.6
-
14
-
-
70349680427
-
Design, processing and reliability characterizations of a 3D-WLCSP packaged component
-
Z. Li, P.N. Houston, D.F. Baldwin, E.A. Stout, T.G. Tessier, and J.L. Evans, "Design, processing and reliability characterizations of a 3D-WLCSP packaged component", IEEE Electronic Components and Technology Conference (ECTC), San Diego, CA, May 2009.
-
IEEE Electronic Components and Technology Conference (ECTC), San Diego, CA, May 2009
-
-
Li, Z.1
Houston, P.N.2
Baldwin, D.F.3
Stout, E.A.4
Tessier, T.G.5
Evans, J.L.6
-
15
-
-
79955970977
-
Crosstalk evaluation, suppression and modeling in 3D through-strata-via (TSV) network
-
Z. Xu, A. Beece, D. Zhang, Q. Chen, K.-N. Chen, K. Rose and J.-Q. Lu, "Crosstalk evaluation, suppression and modeling in 3D through-strata-via (TSV) network", IEEE International Conference on 3D System Integration (3D IC), Munich, Germany, Nov. 2010.
-
IEEE International Conference on 3D System Integration (3D IC), Munich, Germany, Nov. 2010
-
-
Xu, Z.1
Beece, A.2
Zhang, D.3
Chen, Q.4
Chen, K.-N.5
Rose, K.6
Lu, J.-Q.7
-
16
-
-
84863251233
-
A novel chip-to-wafer (C2W) three-dimensional (3D) integration approach using a template for precise alignment
-
doi:10.1016/j.mee.2011.04.047
-
Q. Chen, D. Zhang, Z. Xu, A. Beece, R. Patti, Z. Tan, Z. Wang, L. Liu, and J.-Q. Lu, "A novel chip-to-wafer (C2W) three-dimensional (3D) integration approach using a template for precise alignment", Journal of Microelectronic Engineering, doi:10.1016/j.mee.2011.04.047.
-
Journal of Microelectronic Engineering
-
-
Chen, Q.1
Zhang, D.2
Xu, Z.3
Beece, A.4
Patti, R.5
Tan, Z.6
Wang, Z.7
Liu, L.8
Lu, J.-Q.9
-
17
-
-
78751554802
-
Processing material evaluation and ultra-wideband modeling of through-strata-via (TSV) in 3D integrated circuits and systems
-
Z. Xu, A. Beece, D. Zhang, Q. Chen, K. Rose, and J.- Q. Lu, "Processing material evaluation and ultra-wideband modeling of through-strata-via (TSV) in 3D integrated circuits and systems", IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Shanghai, China, Nov. 2010.
-
IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Shanghai, China, Nov. 2010
-
-
Xu, Z.1
Beece, A.2
Zhang, D.3
Chen, Q.4
Rose, K.5
Lu, J.Q.6
-
18
-
-
61549115557
-
3-D data storage, power delivery, and RF/optical transceiver - Case studies of 3-D integration from system design perspectives
-
Jan.
-
T. Zhang, R. Micheloni, G. Zhang, Z.R. Huang, and J.- Q. Lu, "3-D data storage, power delivery, and RF/optical transceiver - case studies of 3-D integration from system design perspectives", Proceeding of the IEEE, vol. 97, no. 1, pp. 161-174, Jan. 2009.
-
(2009)
Proceeding of the IEEE
, vol.97
, Issue.1
, pp. 161-174
-
-
Zhang, T.1
Micheloni, R.2
Zhang, G.3
Huang, Z.R.4
Lu, J.Q.5
-
19
-
-
47949124019
-
Power delivery for 3D chip stacks: Physical modeling and design implication
-
G. Huang, M. Bakir, A. Naeemi, H. Chen, and J.D. Meindl, "Power delivery for 3D chip stacks: physical modeling and design implication", IEEE Electrical Performance of Electronic Packaging and Systems (EPEPS), Atlanta, GA, Oct. 2007, pp. 205-208.
-
IEEE Electrical Performance of Electronic Packaging and Systems (EPEPS), Atlanta, GA, Oct. 2007
, pp. 205-208
-
-
Huang, G.1
Bakir, M.2
Naeemi, A.3
Chen, H.4
Meindl, J.D.5
-
20
-
-
84866856861
-
Modeling of power delivery into 3D chips on silicon interposer
-
Z. Xu, X. Gu, M. Scheuermann, K. Rose, B.C. Webb, J.U. Knickerbocker, J.-Q. Lu, "Modeling of power delivery into 3D chips on silicon interposer", IEEE Electronic Components and Technology Conference (ECTC), San Diego, CA, May 2012.
-
IEEE Electronic Components and Technology Conference (ECTC), San Diego, CA, May 2012
-
-
Xu, Z.1
Gu, X.2
Scheuermann, M.3
Rose, K.4
Webb, B.C.5
Knickerbocker, J.U.6
Lu, J.-Q.7
-
21
-
-
78650953395
-
Power delivery design for 3-D ICs using different through-silicon-via (TSV) Technologies
-
Mar.
-
N.H. Khan, S.M. Alam, and S. Hassoun, "Power delivery design for 3-D ICs using different through-silicon-via (TSV) Technologies", IEEE Transactions on Very Large Scale Integration Systems, no. 99, pp. 1-12, Mar. 2010.
-
(2010)
IEEE Transactions on Very Large Scale Integration Systems
, Issue.99
, pp. 1-12
-
-
Khan, N.H.1
Alam, S.M.2
Hassoun, S.3
-
22
-
-
57549119325
-
A multistory power delivery techniques for 3D integrated circuits
-
P. Jain, T.-H. Kim, J. Keane, and C.H. Kim, "A multistory power delivery techniques for 3D integrated circuits", IEEE Symposium on Low Power Electrons and Design, Bangalore, India, Aug. 2009, pp. 57-62.
-
IEEE Symposium on Low Power Electrons and Design, Bangalore, India, Aug. 2009
, pp. 57-62
-
-
Jain, P.1
Kim, T.-H.2
Keane, J.3
Kim, C.H.4
-
23
-
-
84863896354
-
Decoupling capacitor modeling and characterization for power supply noise in 3D systems
-
Z. Xu, X. Gu, M. Scheuermann, K. Rose B. Webb, J. Knickerbocker, and J.-Q. Lu, "Decoupling capacitor modeling and characterization for power supply noise in 3D systems", IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, May 2012.
-
IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, May 2012
-
-
Xu, Z.1
Gu, X.2
Scheuermann, M.3
Rose, K.4
Webb, B.5
Knickerbocker, J.6
Lu, J.-Q.7
-
24
-
-
77950977359
-
3D stacked power distribution considering substrate coupling
-
A. Shayan, X. Hu, W. Zhang, C.-K. Cheng, A.E. Engin, X. Chen, and M. Popovich, "3D stacked power distribution considering substrate coupling", IEEE International Conference on Computer Design (ICCD), Lake Tahoe, CA, Oct. 2009, pp. 225-230.
-
IEEE International Conference on Computer Design (ICCD), Lake Tahoe, CA, Oct. 2009
, pp. 225-230
-
-
Shayan, A.1
Hu, X.2
Zhang, W.3
Cheng, C.-K.4
Engin, A.E.5
Chen, X.6
Popovich, M.7
-
25
-
-
10444284956
-
Power delivery system performance optimization of a printed circuit board with multiple microprocessors
-
O.P. Mandhana, and J. Zhao, "Power delivery system performance optimization of a printed circuit board with multiple microprocessors", IEEE Electronic Components and Technology Conference (ECTC), Las Vegas, NV, Jun. 2004, pp. 581-588.
-
IEEE Electronic Components and Technology Conference (ECTC), Las Vegas, NV, Jun. 2004
, pp. 581-588
-
-
Mandhana, O.P.1
Zhao, J.2
-
26
-
-
34748909644
-
3D power delivery for microprocessors and high-performance ASICs
-
J. Sun, J.-Q. Lu, D. Giuliano, T.P. Chow, and R.J. Gutmann, "3D power delivery for microprocessors and high-performance ASICs", IEEE Applied Power Electronics Conference (APEC), Anaheim, CA, Feb. 2007, pp. 127-133.
-
IEEE Applied Power Electronics Conference (APEC), Anaheim, CA, Feb. 2007
, pp. 127-133
-
-
Sun, J.1
Lu, J.-Q.2
Giuliano, D.3
Chow, T.P.4
Gutmann, R.J.5
-
27
-
-
79960413400
-
Electromagnetic-SPICE modeling and analysis of 3D power network
-
Z. Xu, X. Gu, B.C. Webb, J.U. Knickerbocker, and J.- Q. Lu, "Electromagnetic-SPICE modeling and analysis of 3D power network", IEEE Electronic Components and Technology Conference (ECTC), Orlando, FL, June 2011, pp. 2171-2178.
-
IEEE Electronic Components and Technology Conference (ECTC), Orlando, FL, June 2011
, pp. 2171-2178
-
-
Xu, Z.1
Gu, X.2
Webb, B.C.3
Knickerbocker, J.U.4
Lu, J.Q.5
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