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Volumn , Issue , 2009, Pages

Modeling and evaluation for electrical characteristics of through-strata-vias (TSVs) in three-dimensional integration

Author keywords

[No Author keywords available]

Indexed keywords

AGILENT; ELECTRICAL CHARACTERISTIC; ELECTRICAL PERFORMANCE; EQUIVALENT CIRCUIT MODEL; ESSENTIAL COMPONENT; FREQUENCY DOMAINS; MODELING RESULTS; PASSIVE ELEMENTS; THREE DIMENSIONAL INTEGRATION; THREE-DIMENSIONAL (3D); TIME DOMAIN; WAVE SCATTERING PARAMETERS;

EID: 70549095281     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2009.5306543     Document Type: Conference Paper
Times cited : (38)

References (9)
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    • J.-Q. Lu,"3-D Hyperintegration and Packaging Technologies for Micro- Nano Systems," Proc. IEEE, Vol. 97, no. 1, Jan 2009, pp. 18-30.
    • (2009) Proc. IEEE , vol.97 , Issue.1 , pp. 18-30
    • Lu, J.-Q.1
  • 2
    • 57249105440 scopus 로고    scopus 로고
    • 3-D ICs Enter Commercialization
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    • Philip Garrou, "3-D ICs Enter Commercialization," Semiconductor International Mag., Nov. 2008, pp. 44-49.
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    • Garrou, P.1
  • 4
    • 24344491536 scopus 로고    scopus 로고
    • Microwave Characterization and Modeling of High Aspect Ratio Through-Wafer Interconnect Vias in Silicon Substrate
    • Aug
    • L.L.W. Leung and K.J. Chen, "Microwave Characterization and Modeling of High Aspect Ratio Through-Wafer Interconnect Vias in Silicon Substrate," IEEE Tran. Microwave theory and techniques, Vol. 53, No. 8, Aug. 2005, pp. 2472-2480.
    • (2005) IEEE Tran. Microwave theory and techniques , vol.53 , Issue.8 , pp. 2472-2480
    • Leung, L.L.W.1    Chen, K.J.2
  • 5
    • 61549088065 scopus 로고    scopus 로고
    • Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits
    • Jan
    • V.F. Pavlidis and E.F. Friedman., "Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits," Proc. IEEE, vol. 97, no. 1, Jan. 2009, pp. 123-140.
    • (2009) Proc. IEEE , vol.97 , Issue.1 , pp. 123-140
    • Pavlidis, V.F.1    Friedman, E.F.2
  • 6
    • 34250872157 scopus 로고    scopus 로고
    • CMOS-Compatible Through Silicon Vias for 3D Process Integration
    • C.K. Tsang et al., "CMOS-Compatible Through Silicon Vias for 3D Process Integration," Mater. Res. Soc. Symp. Proc. Vol. 970, 2007.
    • (2007) Mater. Res. Soc. Symp. Proc , vol.970
    • Tsang, C.K.1
  • 7
    • 33947407658 scopus 로고    scopus 로고
    • Three-dimensional integrated circuits and the future of systemon- chip designs
    • R. Patti, "Three-dimensional integrated circuits and the future of systemon- chip designs," Proc. IEEE, vol. 94, no. 6, 2006, pp. 1214-1222.
    • (2006) Proc. IEEE , vol.94 , Issue.6 , pp. 1214-1222
    • Patti, R.1
  • 8
    • 51349164996 scopus 로고    scopus 로고
    • Development of 3D Silicon Module with TSV for System in Packaging
    • N. Khan et al., "Development of 3D Silicon Module with TSV for System in Packaging," Electronic Components and Technology Conference, 2008, pp. 550-555.
    • (2008) Electronic Components and Technology Conference , pp. 550-555
    • Khan, N.1
  • 9
    • 34250797327 scopus 로고    scopus 로고
    • Thermo-mechanical Reliability of 3D-integrated Microstructures in Stacked Silicon
    • B. Wunderle et al., "Thermo-mechanical Reliability of 3D-integrated Microstructures in Stacked Silicon," Material Research Society Proc. Vol. 970, 2006.
    • (2006) Material Research Society Proc , vol.970
    • Wunderle, B.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.