Characterization and modeling of solder balls and through-strata-vias (TSVs) in 3D architecture

2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010

Volumn , Issue , 2010, Pages 37-40

  Xu, Zheng ^a   Beece, Adam ^a   Zhang, Dingyou ^a   Chen, Qianwen ^a   Rose, Kenneth ^a   Lu, Jian Qiang ^a  

^a RENSSELAER POLYTECHNIC INSTITUTE   (United States)

Author keywords

3D integration and packaging; Electrical performance modeling; Solder ball; Through Strata Via (TSV)

Indexed keywords

3D MODELING; CHIP SCALE PACKAGES; COMPUTER AIDED DESIGN; CROSSTALK; FREQUENCY RESPONSE; INTEGRATION; SCATTERING PARAMETERS; SEMICONDUCTOR DEVICE MANUFACTURE; SOLDERING; TIME DOMAIN ANALYSIS; TRANSIENT ANALYSIS;

3-D INTEGRATION; ELECTRICAL CHARACTERISTIC; ELECTRICAL PERFORMANCE; HETEROGENEOUS INTEGRATION; REDISTRIBUTION LAYERS; SEMICONDUCTOR INDUSTRY; SOLDER BALLS; THROUGH-STRATA-VIA (TSV);

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 78650950340     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPEPS.2010.5642538     Document Type: Conference Paper

References (3)

1. J.-Q. Lu,"3-D Hyperintegration and Packaging Technologies for Micro-Nano Systems," Proc. IEEE, vol. 97, no. 1, Jan. 2009, pp. 18-30.
2. J.U. Knickerbocker et al., "Three-Dimensional Silicon integration," IBM Journal of Research and Development, vol. 52, no. 6, Nov. 2008, pp. 537-664.
3. Z. Xu, A. Beece, T. Zhang, K. Rose, and J.-Q. Lu, "Modeling and Evaluation for Electrical Characteristics of Through-Strata-Vias (TSVs) in Three-Dimensional Integration," IEEE International 3D System Integration Conference (3D IC), San Francisco, CA, Sept. 2009.