-
1
-
-
33947407658
-
Three-dimensional integrated circuits and the future of system-on-chip designs
-
Jun
-
R. S. Patti, "Three-dimensional integrated circuits and the future of system-on-chip designs," Proc. IEEE, vol. 94, pp. 1214-1224, Jun. 2006.
-
(2006)
Proc. IEEE
, vol.94
, pp. 1214-1224
-
-
Patti, R.S.1
-
2
-
-
61549115783
-
-
Online, Available
-
J.-Q. Lu, K. Rose, and S. Vitkavage. (2007, Jul.). 3D integration: Why, what, who, when? Future Fab Int., pp. 25-27. [Online]. Available: http://www.future-fab.com/
-
(2007)
Jul.). 3D integration: Why, what, who, when? Future Fab Int., pp. 25-27
-
-
Lu, J.-Q.1
Rose, K.2
Vitkavage, S.3
-
3
-
-
61549091356
-
3D architecture for power delivery to microprocessors and ASICs,
-
J.-Q. Lu, J. Sun, D. Giuliano, and R. J. Gutmann, "3D architecture for power delivery to microprocessors and ASICs, " in Proc. 3rd Int. Conf 3D Architect. Semiconduct. Integr. Packag., 2006.
-
(2006)
Proc. 3rd Int. Conf 3D Architect. Semiconduct. Integr. Packag
-
-
Lu, J.-Q.1
Sun, J.2
Giuliano, D.3
Gutmann, R.J.4
-
4
-
-
34748909644
-
3D power delivery for microprocessors and high-performance ASICs
-
J. Sun, J.-Q. Lu, D. Giuliano, T. P. Chow, and R. J. Gutmann, "3D power delivery for microprocessors and high-performance ASICs," in Proc. IEEE Appl. Power Electron. Conf., 2007, pp. 127-133.
-
(2007)
Proc. IEEE Appl. Power Electron. Conf
, pp. 127-133
-
-
Sun, J.1
Lu, J.-Q.2
Giuliano, D.3
Chow, T.P.4
Gutmann, R.J.5
-
5
-
-
9244246679
-
Nanotechnology enables a new memory growth model
-
Nov
-
C. Hwang, "Nanotechnology enables a new memory growth model," Proc. IEEE, vol. 91, pp. 1765-1771, Nov. 2003.
-
(2003)
Proc. IEEE
, vol.91
, pp. 1765-1771
-
-
Hwang, C.1
-
6
-
-
39749172648
-
A 4 Gb 2 b/cell NAND flash memory with embedded 5 b BCH ECC for 36 MB/s system read throughput
-
R. Micheloni et al., "A 4 Gb 2 b/cell NAND flash memory with embedded 5 b BCH ECC for 36 MB/s system read throughput," in Proc. Int. Solid State Circuits Conf. (ISSCC), 2006.
-
(2006)
Proc. Int. Solid State Circuits Conf. (ISSCC)
-
-
Micheloni, R.1
-
7
-
-
0036858243
-
2 1-Gb NAND flash memory with 10-MByte/s program speed
-
Nov
-
2 1-Gb NAND flash memory with 10-MByte/s program speed," IEEE J. Solid-State Circuits, vol. 37, pp. 1493-1501, Nov. 2002.
-
(2002)
IEEE J. Solid-State Circuits
, vol.37
, pp. 1493-1501
-
-
Imamiya, K.1
-
8
-
-
0038306352
-
A 1.8 V 2 Gb NAND flash memory for mass storage applications
-
J. Lee et al., "A 1.8 V 2 Gb NAND flash memory for mass storage applications," in Proc. IEEE Int. Solid-State Circuits Conf., 2003, p. 290.
-
(2003)
Proc. IEEE Int. Solid-State Circuits Conf
, pp. 290
-
-
Lee, J.1
-
9
-
-
31344437566
-
2 8-Gb multi-level NAND flash memory with 70-nm CMOS technology
-
Jan
-
2 8-Gb multi-level NAND flash memory with 70-nm CMOS technology," IEEE J. Solid-State Circuits, vol. 41, pp. 161-169, Jan. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, pp. 161-169
-
-
Hara, T.1
-
10
-
-
33846216331
-
2 8-Gb multi-level NAND flash memory with 10-MB/s program throughput
-
Jan
-
2 8-Gb multi-level NAND flash memory with 10-MB/s program throughput," IEEE J. Solid-State Circuits, vol. 42, pp. 219-232, Jan. 2007.
-
(2007)
IEEE J. Solid-State Circuits
, vol.42
, pp. 219-232
-
-
Takeuchi, K.1
-
12
-
-
0000027444
-
A 144-Mb, eight-level NAND flash memory with optimized pulsewidth programming
-
May
-
H. Nobukata et al., "A 144-Mb, eight-level NAND flash memory with optimized pulsewidth programming," IEEE J. Solid-State Circuits, vol. 35, pp. 682-690, May 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, pp. 682-690
-
-
Nobukata, H.1
-
13
-
-
0015095237
-
Inversionless decoding of binary BCH codes
-
Jul
-
H. O. Burton, "Inversionless decoding of binary BCH codes," IEEE Trans. Inf. Theory, vol. IT-17, pp. 464-466, Jul. 1971.
-
(1971)
IEEE Trans. Inf. Theory
, vol.IT-17
, pp. 464-466
-
-
Burton, H.O.1
-
16
-
-
33846213489
-
A 65-nm dual-core multithreaded Xeon processor with 16-MB L3 cache
-
R. Rusu et al., "A 65-nm dual-core multithreaded Xeon processor with 16-MB L3 cache," IEEE J. Solid-State Circuits, vol. 42, pp. 17-25, 2007.
-
(2007)
IEEE J. Solid-State Circuits
, vol.42
, pp. 17-25
-
-
Rusu, R.1
-
17
-
-
10444284956
-
Power delivery system performance optimization of a printed circuit board with multiple microprocessors
-
O. P. Mandhana and J. Zhao, "Power delivery system performance optimization of a printed circuit board with multiple microprocessors," in Proc. Electron. Comp. Technol. Conf., 2004, pp. 581-588.
-
(2004)
Proc. Electron. Comp. Technol. Conf
, pp. 581-588
-
-
Mandhana, O.P.1
Zhao, J.2
-
18
-
-
0034497816
-
Tradeoffs in modeling the response of power delivery systems of high-performance microprocessors
-
B. Beker and T. Hirsch, "Tradeoffs in modeling the response of power delivery systems of high-performance microprocessors," in IEEE Conf. EPEP, 2000, pp. 77-80.
-
(2000)
IEEE Conf. EPEP
, pp. 77-80
-
-
Beker, B.1
Hirsch, T.2
-
20
-
-
61549135907
-
-
Semiconductor Industry Association, Online, Available
-
Semiconductor Industry Association, The International Technology Roadmap for Semiconductors (ITRS). [Online]. Available: http://www.itrs.net/reports.html
-
-
-
-
21
-
-
33749531769
-
Low profile integratable inductor fabricated based on LTCC technology for microprocessor power delivery applications
-
M. H. F. Lim, Z. Liang, and J. D. van Wyk, "Low profile integratable inductor fabricated based on LTCC technology for microprocessor power delivery applications," in Proc. IEEE Appl. Power Electron. Conf., 2006, p. 7.
-
(2006)
Proc. IEEE Appl. Power Electron. Conf
, pp. 7
-
-
Lim, M.H.F.1
Liang, Z.2
van Wyk, J.D.3
-
22
-
-
34547335684
-
Design and simulation of on-chip RF magnetic medium inductors
-
Y. Chen et al., "Design and simulation of on-chip RF magnetic medium inductors," in Proc. Int. Conf. Solid-State Integr. Circuit Technol., 2006, pp. 587-589.
-
(2006)
Proc. Int. Conf. Solid-State Integr. Circuit Technol
, pp. 587-589
-
-
Chen, Y.1
-
23
-
-
4544321366
-
Power distribution networks for system-on-package: Status and challenges
-
M. Swaminathan, J. Kim, I. Novak, and J. P. Libous, "Power distribution networks for system-on-package: Status and challenges," IEEE Trans. Adv. Packag., vol. 27, pp. 286-300, 2004.
-
(2004)
IEEE Trans. Adv. Packag
, vol.27
, pp. 286-300
-
-
Swaminathan, M.1
Kim, J.2
Novak, I.3
Libous, J.P.4
-
25
-
-
16244362042
-
Feasibility of monolithic and vertical-stacked dc-dc converters for microprocessors in 90 nm technology generation
-
G. Schrom et al., "Feasibility of monolithic and vertical-stacked dc-dc converters for microprocessors in 90 nm technology generation," in Proc. Int. Symp. Low Power Electron. Design, 2004, pp. 263-268.
-
(2004)
Proc. Int. Symp. Low Power Electron. Design
, pp. 263-268
-
-
Schrom, G.1
-
26
-
-
0034484268
-
Enhancing power distribution system through vertical integrated models, optimized designs, and switching VRM model
-
Y. L. Li et al., "Enhancing power distribution system through vertical integrated models, optimized designs, and switching VRM model," in Proc. Electron. Comp. Technol. Conf., 2000, pp. 272-277.
-
(2000)
Proc. Electron. Comp. Technol. Conf
, pp. 272-277
-
-
Li, Y.L.1
-
27
-
-
46449109402
-
Z-axis processor power delivery system,
-
U.S. Patent 6 523 253
-
J. A. Harrison and E. R. Stanford, "Z-axis processor power delivery system," U.S. Patent 6 523 253.
-
-
-
Harrison, J.A.1
Stanford, E.R.2
-
28
-
-
46449121235
-
Vertically packaged switched-mode power converter,
-
U.S. Patent 7 012 414
-
S. Chandrasekaran, J. Sun, and V. Mehrotra, "Vertically packaged switched-mode power converter," U.S. Patent 7 012 414.
-
-
-
Chandrasekaran, S.1
Sun, J.2
Mehrotra, V.3
-
29
-
-
0034462056
-
3D integration using wafer bonding
-
J.-Q. Lu et al., "3D integration using wafer bonding," in Proc. Adv. Metal. Conf., 2001, pp. 515-521.
-
(2001)
Proc. Adv. Metal. Conf
, pp. 515-521
-
-
Lu, J.-Q.1
-
30
-
-
34547571626
-
Wafer-level three-dimensional hyper-integration technology using dielectric adhesive wafer bonding
-
E. Zschech, C. Whelan, and T. Mikolajick, Eds. London, U.K, Springer-Verlag, Aug
-
J.-Q. Lu, T. S. Cale, and R. J. Gutmann, "Wafer-level three-dimensional hyper-integration technology using dielectric adhesive wafer bonding," in Materials for Information Technology: Devices, Interconnects and Packaging, E. Zschech, C. Whelan, and T. Mikolajick, Eds. London, U.K.: Springer-Verlag, Aug. 2005, pp. 386-397.
-
(2005)
Materials for Information Technology: Devices, Interconnects and Packaging
, pp. 386-397
-
-
Lu, J.-Q.1
Cale, T.S.2
Gutmann, R.J.3
-
31
-
-
23844497416
-
A wafer-level 3D IC technology platform
-
R. J. Gutmann et al., "A wafer-level 3D IC technology platform," in Proc. Adv. Metallization Conf., 2003, pp. 19-26.
-
(2003)
Proc. Adv. Metallization Conf
, pp. 19-26
-
-
Gutmann, R.J.1
-
32
-
-
24644439334
-
Wafer bonding of damascene-patterned metal/adhesive redistribution layers for via-first three-dimensional (3D) interconnect
-
J. J. McMahon, J.-Q. Lu, and R. J. Gutmann, "Wafer bonding of damascene-patterned metal/adhesive redistribution layers for via-first three-dimensional (3D) interconnect," in Proc. IEEE Electron. Comp. Technol. Conf. (ECTC), 2005, pp. 331-336.
-
(2005)
Proc. IEEE Electron. Comp. Technol. Conf. (ECTC)
, pp. 331-336
-
-
McMahon, J.J.1
Lu, J.-Q.2
Gutmann, R.J.3
-
33
-
-
34748834221
-
Tera-scale computing - the role of interconnects in volume compute platforms
-
J. Bautista, "Tera-scale computing - the role of interconnects in volume compute platforms," in Proc. IEEE Conf. IITC, 2007, pp. 187-189.
-
(2007)
Proc. IEEE Conf. IITC
, pp. 187-189
-
-
Bautista, J.1
-
34
-
-
34547273500
-
High-frequency DC-DC conversion: Fact or fiction
-
T. Karnik et al., "High-frequency DC-DC conversion: Fact or fiction," in Proc. IEEE Int. Symp. Circuits Syst., 2006, pp. 245-248.
-
(2006)
Proc. IEEE Int. Symp. Circuits Syst
, pp. 245-248
-
-
Karnik, T.1
-
35
-
-
61549087648
-
A single-chip quad-band GSM/GPRS transceiver in 0.18 μm standard CMOS
-
E. Erdogan et al., "A single-chip quad-band GSM/GPRS transceiver in 0.18 μm standard CMOS," in Proc. Int. Solid-State Circuits Conf., 2004, pp. 318-320.
-
(2004)
Proc. Int. Solid-State Circuits Conf
, pp. 318-320
-
-
Erdogan, E.1
-
36
-
-
0004200915
-
-
Englewood Cliffs, NJ: Prentice-Hall
-
B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Prentice-Hall, 1998.
-
(1998)
RF Microelectronics
-
-
Razavi, B.1
-
37
-
-
84867695972
-
A fully integrated 24 GHz 8-path phased-array receiver in silicon
-
H. Hashemi et al., "A fully integrated 24 GHz 8-path phased-array receiver in silicon," in Proc. IEEE Int. Solid-State Circuits Conf., 2004, p. 390.
-
(2004)
Proc. IEEE Int. Solid-State Circuits Conf
, pp. 390
-
-
Hashemi, H.1
-
38
-
-
1942422651
-
Integrated antennas on silicon substrates for communication over free space
-
J.-J. Lin et al., "Integrated antennas on silicon substrates for communication over free space," IEEE Electron Device Lett., vol. 25, pp. 196-198, 2004.
-
(2004)
IEEE Electron Device Lett
, vol.25
, pp. 196-198
-
-
Lin, J.-J.1
-
39
-
-
33747262639
-
Enhanced patch-antenna performance by suppressing surface waves using phonotic-bandgap substrates
-
Nov
-
R. Gonzalo, P. DeMaagt, and M. Sorolla, "Enhanced patch-antenna performance by suppressing surface waves using phonotic-bandgap substrates," IEEE Trans. Microwave Theory Tech., vol. 47, pp. 2131-2138, Nov. 1999.
-
(1999)
IEEE Trans. Microwave Theory Tech
, vol.47
, pp. 2131-2138
-
-
Gonzalo, R.1
DeMaagt, P.2
Sorolla, M.3
-
40
-
-
0033319756
-
Patch antennas on externally perforated high dielectric constant substrates
-
Dec
-
J. S. Colburn and Y. Rahmat-Samii, "Patch antennas on externally perforated high dielectric constant substrates," IEEE Trans. Antennas Propag., vol. 47, pp. 1785-1794, Dec. 1999.
-
(1999)
IEEE Trans. Antennas Propag
, vol.47
, pp. 1785-1794
-
-
Colburn, J.S.1
Rahmat-Samii, Y.2
-
41
-
-
0027644554
-
Microstrip patch designs that do not excite surface waves
-
Aug
-
D. R. Jackson, J. T. Williams, and A. K. Bhattacharyya, "Microstrip patch designs that do not excite surface waves," IEEE Trans. Antennas Propag., vol. 41, pp. 1026-1037, Aug. 1993.
-
(1993)
IEEE Trans. Antennas Propag
, vol.41
, pp. 1026-1037
-
-
Jackson, D.R.1
Williams, J.T.2
Bhattacharyya, A.K.3
-
42
-
-
0032002207
-
Micromachined patch antennas
-
Feb
-
J. Papapolymerou, R. F. Drayton, and L. P. B. Katehi, "Micromachined patch antennas," IEEE Trans. Antennas Propag., vol. 46, pp. 275-283, Feb. 1998.
-
(1998)
IEEE Trans. Antennas Propag
, vol.46
, pp. 275-283
-
-
Papapolymerou, J.1
Drayton, R.F.2
Katehi, L.P.B.3
-
43
-
-
0033318373
-
Stacked patches using high and low dielectric constant material combinations
-
R. B. Waterhouse, "Stacked patches using high and low dielectric constant material combinations," IEEE Trans. Antennas Propag., vol. 47, pp. 1767-1771, 1999.
-
(1999)
IEEE Trans. Antennas Propag
, vol.47
, pp. 1767-1771
-
-
Waterhouse, R.B.1
-
44
-
-
2342620835
-
Fdtd analysis of patch antennas on high dielectric-constant substrates surrounded by by a soft-and-hard surface
-
R. Li, G. DeJean, M. M. Tentzeris, J. Papapolymerou, and J. Laskar, "Fdtd analysis of patch antennas on high dielectric-constant substrates surrounded by by a soft-and-hard surface," IEEE Trans. Magn., vol. 40, pp. 1444-1447, 2004.
-
(2004)
IEEE Trans. Magn
, vol.40
, pp. 1444-1447
-
-
Li, R.1
DeJean, G.2
Tentzeris, M.M.3
Papapolymerou, J.4
Laskar, J.5
-
45
-
-
0034204881
-
A new quasi-Yagi antenna for planar active antenna arrays
-
W. R. Deal et al., "A new quasi-Yagi antenna for planar active antenna arrays," IEEE Trans. Microwave Theory Tech., vol. 48, pp. 910-918, 2000.
-
(2000)
IEEE Trans. Microwave Theory Tech
, vol.48
, pp. 910-918
-
-
Deal, W.R.1
-
47
-
-
0345328213
-
InP/InGaAsP MQW thin film edge emitting lasers for embedded waveguide chip to chip optical interconnections
-
H.-F. Kuo et al., "InP/InGaAsP MQW thin film edge emitting lasers for embedded waveguide chip to chip optical interconnections," in Proc. IEEE LEOS Annu. Meeting, 2003, pp. 63-64.
-
(2003)
Proc. IEEE LEOS Annu. Meeting
, pp. 63-64
-
-
Kuo, H.-F.1
-
48
-
-
0037028274
-
Embedded optical interconnections using thin film InGaAs metal-semiconductor-metal photodetector
-
Z. Huang et al., "Embedded optical interconnections using thin film InGaAs metal-semiconductor-metal photodetector," Electron. Lett., vol. 38, pp. 1708-1709, 2002.
-
(2002)
Electron. Lett
, vol.38
, pp. 1708-1709
-
-
Huang, Z.1
|