3-D technology assessment: Path-finding the technology/design sweet-spot

Proceedings of the IEEE

Volumn 97, Issue 1, 2009, Pages 96-107

  Marchal, Paul ^a   Bougard, Bruno ^a,b   Katti, Guruprasad ^c   Stucchi, Michele ^a   Dehaene, Wim ^c   Papanikolaou, Antonis ^a,d   Verkest, Diederik ^a   Swinnen, Bart ^a   Beyne, Eric ^a  

^a IMEC   (Belgium)

^b Septentrio NV Leuven   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

^d NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

Author keywords

Design automation; Design centering; Integrated circuit design; Technology assessment

Indexed keywords

INTEGRATED CIRCUIT DESIGN; SEMICONDUCTOR DEVICE MANUFACTURE;

DESIGN AUTOMATIONS; DESIGN CENTERING; SEMICONDUCTOR INDUSTRY; TECHNOLOGY AND DESIGNS; TECHNOLOGY ASSESSMENTS; TECHNOLOGY DEVELOPMENT; TECHNOLOGY OPTIONS; THREEDIMENSIONAL (3-D);

COMPUTER AIDED DESIGN;

EID: 61549106848     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2008.2007471     Document Type: Article

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