SCOPUS 정보 검색 플랫폼

Volumn 3, Issue 11, 2011, Pages 4575-4579

Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes

(3) Muralidharan, Girish a Bhat, Navakanta a Santhanam, Venugopal a

a INDIAN INSTITUTE OF SCIENCE (India)

Author keywords

[No Author keywords available]

Indexed keywords

2D ARRAYS; CHARGE STORAGE; FLOATING-GATE DEVICES; GOLD NANOPARTICLES; NONVOLATILE MEMORY DEVICES; ORDERED ARRAY; SELF-ASSEMBLED;

NANOPARTICLES;

GOLD;

GOLD; NANOMATERIAL;

ARTICLE; CHEMISTRY; CRYSTALLIZATION; DATA STORAGE DEVICE; EQUIPMENT; EQUIPMENT DESIGN; INSTRUMENTATION; MATERIALS TESTING; METHODOLOGY; NANOTECHNOLOGY; PARTICLE SIZE; ULTRASTRUCTURE;

COMPUTER STORAGE DEVICES; CRYSTALLIZATION; EQUIPMENT DESIGN; EQUIPMENT FAILURE ANALYSIS; GOLD; MATERIALS TESTING; NANOSTRUCTURES; NANOTECHNOLOGY; PARTICLE SIZE;

EID: 84856435769 PISSN: 20403364 EISSN: 20403372 Source Type: Journal
DOI: 10.1039/c1nr10884k Document Type: Article

Times cited : (14)

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