Analytical unified threshold voltage model of short-channel FinFETs and implementation

Solid-State Electronics

Volumn 64, Issue 1, 2011, Pages 34-41

  Fasarakis, N ^a   Tsormpatzoglou, A ^a   Tassis, D H ^a   Dimitriadis, C A ^a   Papathanasiou, K ^a   Jomaah, J ^b   Ghibaudo, G ^b  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b MINATEC   (France)

Author keywords

Double gate FinFETs; Threshold voltage; Tri gate FinFETs

Indexed keywords

CHANNEL LENGTH; COMPACT MODEL; DEVICE SIMULATORS; DOUBLE-GATE; EFFECTIVE PARAMETERS; ELECTROSTATIC CONTROL; FIN HEIGHT; FIN WIDTHS; FINFETS; SHORT-CHANNEL EFFECT; SIMULATION RESULT; SPECTRE SIMULATORS; TOP GATE; TRIGATE; VERILOG-A;

FIELD EFFECT TRANSISTORS; FINS (HEAT EXCHANGE); INTEGRATED CIRCUITS; LEAKAGE CURRENTS; THRESHOLD VOLTAGE;

COMPUTER SIMULATION;

EID: 80054957441     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2011.06.049     Document Type: Article

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