Experimental characterization of the subthreshold leakage current in triple-gate FinFETs

Solid-State Electronics

Volumn 53, Issue 3, 2009, Pages 359-363

  Tsormpatzoglou, A ^a   Dimitriadis, C A ^a   Mouis, M ^b   Ghibaudo, G ^b   Collaert, N ^c  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b MINATEC   (France)

^c IMEC   (Belgium)

Author keywords

FinFET; Interface state density; Leakage current; Tunneling

Indexed keywords

DRAIN CURRENT; ELECTRON TUNNELING; FIELD EFFECT TRANSISTORS; FINS (HEAT EXCHANGE); MOSFET DEVICES;

CURRENT BEHAVIORS; DRAIN LEAKAGE CURRENTS; EXPERIMENTAL CHARACTERIZATIONS; FIN WIDTHS; FINFET; FINFETS; GATE EDGES; GATE INTERFACES; GATE LENGTHS; GATE TUNNELING CURRENTS; INTERFACE STATE DENSITY; POWER-SUPPLY VOLTAGES; SHORT-CHANNEL EFFECTS; SUB THRESHOLDS; SUBTHRESHOLD LEAKAGE CURRENTS; TOP GATES; TRIPLE GATES; TUNNELING;

LEAKAGE CURRENTS;

EID: 61549092155     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2009.01.008     Document Type: Article

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