FinFET design considerations based on 3-D simulation and analytical modeling

IEEE Transactions on Electron Devices

Volumn 49, Issue 8, 2002, Pages 1411-1419

  Pei, Gen ^a,b   Kedzierski, Jakub ^a,c   Oldiges, Phil ^a,d   Ieong, Meikei ^a,c   Kan, Edwin Chih Chuan ^a,b  

^a IEEE   (United States)

^b Cornell University   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

^d IBM MICROELECTRONICS   (United States)

Author keywords

Double gate MOSFET; FinFET; Short channel effects; Silicon on insulator (SOI)

Indexed keywords

ELECTROSTATIC POTENTIAL; ROLL OFF; SHORT CHANNEL EFFECTS; SILICON FIN; SUBTHRESHOLD SWING;

COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC FIELD EFFECTS; GATES (TRANSISTOR); LAPLACE TRANSFORMS; LEAKAGE CURRENTS; SEMICONDUCTING SILICON; SILICON ON INSULATOR TECHNOLOGY; THREE DIMENSIONAL; THRESHOLD VOLTAGE;

MOSFET DEVICES;

EID: 0036684706     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.801263     Document Type: Article

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