Physically-based threshold voltage determination for MOSFET's of all gate lengths

IEEE Transactions on Electron Devices

Volumn 46, Issue 7, 1999, Pages 1429-1434

  Tsuno, Morikazu ^b,c   Suga, Masato ^b   Tanaka, Masayasu ^b   Shibahara, Kentaro ^a,b   Miura Mattausch, Mitiko ^a,b   Hirose, Masataka ^a,b  

^a IEEE

^b HIROSHIMA UNIVERSITY   (Japan)

^c Matsusita Electronics Corporation   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

TRANSCONDUCTANCE GM-LINEAR EXTRAPOLATION (GMLE) METHOD;

EXTRAPOLATION; GATES (TRANSISTOR); THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

MOSFET DEVICES;

EID: 0032651359     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.772487     Document Type: Article

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