Compact Verilog-A model of phase-change RAM transient behaviors for multi-level applications

Semiconductor Science and Technology

Volumn 26, Issue 10, 2011, Pages

  Jung, Chul Moon ^a   Lee, Eun Sub ^a   Min, Kyeong Sik ^a   Kang, Sung Mo ^b  

^a Kookmin University   (South Korea)

^b University of California Santa Cruz   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRICAL BEHAVIORS; MULTI-LEVEL; NEGATIVE DIFFERENTIAL RESISTANCES; NEW MODEL; ONE-EQUATION; PARTIAL STATE; PHASE-CHANGE RAM; PIECE-WISE; PIECEWISE LINEAR MODELS; PROGRAMMING TRANSIENT; SMOOTH TRANSITIONS; TRANSIENT BEHAVIOR; VERILOG-A;

BEHAVIORAL RESEARCH; PARAMETER EXTRACTION; PIECEWISE LINEAR TECHNIQUES;

COMPUTER SIMULATION;

EID: 80053354498     PISSN: 02681242     EISSN: 13616641     Source Type: Journal    
DOI: 10.1088/0268-1242/26/10/105018     Document Type: Article

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