Parameterized SPICE model for a phase-change RAM device

IEEE Transactions on Electron Devices

Volumn 53, Issue 1, 2006, Pages 112-117

  Cobley, Rosie A ^a,b   Wright, C David ^a,b  

^a IEEE   (United Kingdom)

^b UNIVERSITY OF EXETER   (United Kingdom)

Author keywords

Amorphous semiconductors; Circuit modeling; Memories; Phase change random access memory (PC RAM); SPICE

Indexed keywords

CIRCUIT MODELING; MULTIPLE LEVEL MODELS; NONLINEAR PHASE SWITCHING; PHASE-CHANGE RANDOM ACCESS MEMORY (PC-RAM); PROGRAMMING CYCLE;

COMPUTER SIMULATION; LUMPED PARAMETER NETWORKS; MATHEMATICAL MODELS; PARAMETERIZATION; PHASE CHANGE MEMORY; SEMICONDUCTOR MATERIALS; TRANSIENT ANALYSIS;

RANDOM ACCESS STORAGE;

EID: 33747741013     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.860642     Document Type: Article

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