Verilog-A model for phase change memory simulation

International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Volumn , Issue , 2008, Pages 492-495

  Kwong, K C ^a   Li, Lin ^a   He, Jin ^a,b   Chan, Mansun ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^b PEKING UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGES; EXPERIMENTAL DATUM; PHASE-CHANGE MEMORIES; TEMPERATURE SENSING; VERILOG-A;

CIRCUIT SIMULATION; INTEGRATED CIRCUITS; PULSE CODE MODULATION;

PHASE CHANGE MEMORY;

EID: 60649099246     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSICT.2008.4734588     Document Type: Conference Paper

References (4)

1. S. Lai, IEDM '03, p.10.1.1-10.1.4 (2003).
2. Ovonyx Inc., Technical presentation titled "Ovonic Unified Memory", slide 27 (1999).
3. Rosie A Cobley and C. David Wright, IEEE TED, vol. 53, no. 1 (2006).
4. Ovonyx Inc. www.ovonyx.com/technology [5] Ovonyx Inc., Technical presentation titled "Ovonic Unified Memory", slide 21 (1999).