Phase change memory modeling using verilog-A

2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS

Volumn , Issue , 2007, Pages 159-164

  Liao, Yi Bo ^a   Chen, Yan Kai ^a   Chiang, Meng Hsueh ^a  

^a NATIONAL ILAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ARSENIC COMPOUNDS; CIRCUIT SIMULATION; PULSE CODE MODULATION;

BEHAVIORAL MODELING AND SIMULATION; CIRCUIT MODELING; COMPACT PHASE; VERILOG-A MODELING;

PHASE CHANGE MEMORY;

EID: 51349134198     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/BMAS.2007.4437544     Document Type: Conference Paper

References (5)

1. G. Atwood and R. Bez, "Current status of Chalcogenide phase change memory," Device Research Conference Tech. Dig., Vol. 1, 2005, pp. 29-33.
2. A. L. Lacaita, "Physics and Performance of Phase Change Memories," Simulation of Semiconductor Processes and Devices Tech. Dig., 2005, pp. 267-270.
3. M. Gh. Mohammad, L. Terkawi, and M. Albasman, "Phase Change Memory Faults," Proceedings of the 19th International Conference on VLSI Design, 2006.
4. D. Ielmini, A. L. Lacaita, A. Pirovano, F. Pellizzer, and R. Bez, "Analysis of phase distribution in phase-change nonvolatile memories," IEEE Electron Device Letters, Vol. 25, pp. 507-509, July 2004.
5. HSPICE user's manual version 2006.03.