Addressing Cu/low-κ Dielectric TDDB-reliability challenges for advanced CMOS technologies

IEEE Transactions on Electron Devices

Volumn 56, Issue 1, 2009, Pages 2-12

  Chen, Fen ^a   Shinosky, Mike ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

Back end of the line (BEOL) process integration; Cu interconnect reliability; Cu migration; Line spacing variation; Line edgeroughness (LER) variation; Low k reliability; Low k TDDB field acceleration; Low k time dependent dielectric breakdown (TDDB); Square root of E model

Indexed keywords

BACK-END-OF-THE-LINE (BEOL) PROCESS INTEGRATION; CU INTERCONNECT RELIABILITY; CU MIGRATION; LINE SPACING VARIATION; LINE-EDGEROUGHNESS (LER) VARIATION; LOW-K RELIABILITY; LOW-K TDDB FIELD ACCELERATION; LOW-K TIME-DEPENDENT DIELECTRIC BREAKDOWN (TDDB); SQUARE ROOT OF E MODEL;

CAPACITANCE; DELAY CIRCUITS; ELECTRIC BREAKDOWN; LOGIC CIRCUITS; OPTICAL INTERCONNECTS; RELIABILITY; SWITCHING CIRCUITS; VLSI CIRCUITS;

DIELECTRIC MATERIALS;

EID: 70349139290     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2008.2008680     Document Type: Article

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