Low-damage etching process for hp45 Cu/low-k interconnects

Advanced Metallization Conference (AMC)

Volumn , Issue , 2006, Pages 263-269

  Soda, E ^a   Watanabe, T ^a   Matsubara, Y ^a   Matsuura, S ^a   Koba, F ^a   Kondo, S ^a   Kobayashi, N ^a  

^a SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; DIELECTRIC DEVICES; ELECTRIC POWER SYSTEM INTERCONNECTION; FAILURE (MECHANICAL); PHOTOLITHOGRAPHY; SILICON CARBIDE; SILICON WAFERS; HIGH TEMPERATURE EFFECTS; INTERCONNECTION NETWORKS; REDUCTION; SILICON COMPOUNDS;

CRITICAL DIMENSION (CD); ELECTRON PROJECTION LITHOGRAPHY (EPL); ETCHING DAMAGE; LINE EDGE ROUGHNESS (LER); PLASMA-INDUCED DAMAGE; LOW-DAMAGE ETCHING PROCESS;

ETCHING; DRY ETCHING;

EID: 33644957452     PISSN: 15401766     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. H. Nambu et al., Proceeding of Int. Symp. Dry process, 15 (2002)
2. K. Yonekura et al., Proceeding of Int. Symp. Dry process, 19 (2003)
3. A. Matsushita et al., Proc. IITC, 147 (2003)
4. N. Posseme et al., Proceeding of Int. Symp. Dry process, 217 (2004)