Modeling and fabrication of ZnO nanowire transistors

IEEE Transactions on Electron Devices

Volumn 55, Issue 11, 2008, Pages 3012-3019

  Pearton, Steve J ^a   Norton, Dave P ^a   Tien, Li Chia ^a   Guo, Jing ^a  

^a University of Florida   (United States)

Author keywords

Heterostructures; Nanowires (NWs); ZnO

Indexed keywords

CHARGE DENSITY; CRYSTAL GROWTH; CRYSTALS; DRAIN CURRENT; ELECTRIC WIRE; ELECTRICAL ENGINEERING; ELECTRON MOBILITY; GATE DIELECTRICS; GATES (TRANSISTOR); GRAIN BOUNDARIES; NANOSTRUCTURED MATERIALS; NANOSTRUCTURES; NANOWIRES; PASSIVATION; SEMICONDUCTING ZINC COMPOUNDS; TRANSISTORS; TRANSPORT PROPERTIES; ZINC ALLOYS;

BOTTOM GATES; CURRENT SATURATIONS; DC CHARACTERISTICS; DEVICE STABILITIES; HETEROSTRUCTURES; NW TRANSISTORS; ON/OFF RATIOS; OPTOELECTRONIC INTEGRATIONS; SUB THRESHOLDS; SURFACE CHARGE DENSITIES; SURFACE PASSIVATIONS; SWITCHING PERFORMANCES; SYNTHESIS OF; VOLTAGE SWINGS; ZNO; ZNO NANOSTRUCTURES; ZNO NANOWIRES;

ZINC OXIDE;

EID: 56549112137     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2008.2005157     Document Type: Article

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