Power optimal dual-Vdd buffered tree considering buffer stations and blockages

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 497-502

  Tam, King Ho ^a   He, Lei ^a  

^a Engineering IV   (United States)

Author keywords

Buffer insertion; Detail routing; Low power

Indexed keywords

COMPUTATIONAL COMPLEXITY; CONSTRAINT THEORY; DATA STRUCTURES; DELAY CIRCUITS; POWER CONTROL; PROBLEM SOLVING;

BUFFER INSERTION; DETAIL ROUTING; LOW POWER;

TREES (MATHEMATICS);

EID: 27944470532     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1065579.1065709     Document Type: Conference Paper

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