1/f noise in deep submicron CMOS technology for RF and analogue applications

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5470, Issue , 2004, Pages 193-207

  Mercha, A ^a   Simoen, E ^a   Decoutere, S ^a   Claeys, C ^b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Gate leakage current; High K gate stacks; Low frequency noise; Mixed signal SOC; Noise reduction techniques; Processing modules; Substrate bias

Indexed keywords

GATE LEAKAGE CURRENTS; HIGH-K GATE STACKS; LOW FREQUENCY NOISE; MIXED SIGNAL SOC; NOISE REDUCTION TECHNIQUES; PROCESSING MODULES; SUBSTRATE BIAS;

DIGITAL CIRCUITS; GATES (TRANSISTOR); INTERNET; LEAKAGE CURRENTS; NOISE ABATEMENT; OPTIMIZATION; SPURIOUS SIGNAL NOISE; SWITCHING;

CMOS INTEGRATED CIRCUITS;

EID: 4344628291     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.546962     Document Type: Conference Paper

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