Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 7, 1999, Pages 1022-1025

  Gierkink, Sander L J ^a   Klumperink, Eric A M ^a   Van Der Wel, Arnoud P ^a   Hoogzaad, Gian ^b   Van Tuijl, Ed ^a,b   Nauta, Bram ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); SIGNAL NOISE MEASUREMENT; SOLID STATE OSCILLATORS; SPURIOUS SIGNAL NOISE;

GATE SOURCE VOLTAGE; INTRINSIC NOISE; PHASE NOISE; RING OSCILLATORS;

MOSFET DEVICES;

EID: 0033363741     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.772418     Document Type: Article

References (9)

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