PSP-SOI: A surface potential based compact model of partially depleted SOI MOSFETs

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2007, Pages 41-48

  Wu, W ^a   Li, X ^a   Gildenblat, G ^a   Workman, G ^b   Veeraraghavan, S ^b   McAndrew, C ^b   Van Langevelde, R ^c   Smit, G D J ^d   Scholten, A J ^d   Klaassen, D B M ^d   Watts, J ^e  

^a Arizona State University   (United States)

^b FREESCALE SEMICONDUCTOR INC   (United States)

^c PHILIPS RESEARCH LABORATORIES   (Netherlands)

^d NXP SEMICONDUCTORS   (Netherlands)

^e IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC RESISTANCE; MATHEMATICAL MODELS; SCALABILITY; SILICON ON INSULATOR TECHNOLOGY; SURFACE POTENTIAL;

COMPACT MODELS; FLOATING BODY SIMULATION;

MOSFET DEVICES;

EID: 39549118887     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2007.4405678     Document Type: Conference Paper

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