Methodology of self-heating free parameter extraction and circuit simulation for SOI CMOS

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2001, Pages 381-384

  Nakayama, H ^a   Su, P ^a   Hu, C ^a   Nakamura, M ^a   Komatsu, H ^a   Takeshita, K ^a   Komatsu, Y ^a  

^a SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; HEAT RESISTANCE; PARAMETER ESTIMATION; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; THERMAL CONDUCTIVITY;

CIRCUIT SIMULATION; SELF HEATING EFFECT; THERMAL CIRCUIT COMPONENTS;

CMOS INTEGRATED CIRCUITS;

EID: 0034822326     PISSN: 08865930     EISSN: None     Source Type: Journal    
DOI: 10.1109/CICC.2001.929805     Document Type: Article

References (8)

1. Measurement of I-V curves of silicon-on-insulator (SOI) MOSFET's without self-heating
2. A partially-depleted SOI compact model - Formulation and parameter extraction
3. BSIMPD: A partial-depletion SOI MOSFET model for deep-submicron CMOS designs
4. Self-heating effects in SOI MOSFET's and their measurement by small signal conductance techniques
5. Self-heating characterization for SOI MOSFET based on AC output conductance
6. SOI MOSFET thermal conductance and its geometry dependence
7. Measurement and modeling of self-heating in SOI NMOSFET's