Floating-body effects in partially depleted SOI CMOS circuits

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 8, 1997, Pages 1241-1252

  Lu, Pong Fei ^a,d,e,f   Chuang, Ching Te ^{a,d,f,g,h,i,j}   Ji, Jin ^a,b,k,l   Wagner, Lawrence F ^{c,m,n,o,p,q,r}   Hsieh, Chang Ming ^c,d,s   Kuang, J B ^c   Hsu, Louis Lu Chen ^c   Pelella Jr , Mario M ^c   Chu, Shao Fu Sanford ^c   Anderson, Carl J ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b NeoParadigm Labs Inc   (United States)

^c IBM   (United States)

^d NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^e PRINCETON UNIVERSITY   (United States)

^f High Performance Circuit Group   (United States)

^g UNIVERSITY OF CALIFORNIA   (United States)

^h Bipolar VLSI Design Group

ⁱ Device Technology Program Committee

^j New York Academy of Science   (United States)

^k TSINGHUA UNIVERSITY   (China)

^l UNIVERSITY OF MICHIGAN   (United States)

^m MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

ⁿ STANFORD UNIVERSITY   (United States)

^o US Army Communications and Electronics Command   (United States)

^p UNIVERSITY OF HAWAII   (United States)

^q IBM MICROELECTRONICS   (United States)

^r AMERICAN PHYSICAL SOCIETY   (United States)

^s POLYTECHNIC UNIVERSITY   (United States)

more..

Author keywords

Circuit modeling; Silicon on insulator technology

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; ELECTRIC NETWORK TOPOLOGY; MOSFET DEVICES; MULTIPLEXING EQUIPMENT; SILICON ON INSULATOR TECHNOLOGY; SWITCHING CIRCUITS; VLSI CIRCUITS;

DYNAMIC CASCADE VOLTAGE SWITCH LOGIC (CVSL); FLOATING BODY;

CMOS INTEGRATED CIRCUITS;

EID: 0031210445     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.604080     Document Type: Article

References (12)

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