Impact of self-heating and thermal coupling on analog circuits in SOI CMOS

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 7, 1998, Pages 1037-1046

  Tenbroek, Bernard M ^a,c,d   Lee, Michael S L ^a,e,f   Redman White, William ^a,g,h,i,j,k   Bunyan, R John T ^b,l,m   Uren, Michael J ^b,e,f,n  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

^b DEFENCE SCIENCE AND TECHNOLOGY LABORATORY   (United Kingdom)

^c UNIVERSITY OF TWENTE   (Netherlands)

^d Telkom SA Limited   (South Africa)

^e UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^f University of Cambridge ^*

^g UNIVERSITY OF EXETER   (United Kingdom)

^h Post Office Telecommunications

ⁱ GEC Hirst Research Center   (United Kingdom)

^j MOTOROLA INC   (United States)

^k NXP SEMICONDUCTORS   (Netherlands)

^l UNIVERSITY OF EDINBURGH   (United Kingdom)

^m UNIVERSITY OF LIVERPOOL   (United Kingdom)

ⁿ Institute of Physics

more..

Author keywords

Analog; CMOS; Self heating; Silicon on insulator; Thermal coupling

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIGITAL TO ANALOG CONVERSION; FREQUENCY DOMAIN ANALYSIS; SILICON ON INSULATOR TECHNOLOGY; SWITCHING CIRCUITS; TIME DOMAIN ANALYSIS; TRANSISTORS;

CURRENT MIRRORS; SELF HEATING; THERMAL COUPLING;

LINEAR INTEGRATED CIRCUITS;

EID: 0032122783     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.701253     Document Type: Article

References (18)

1. L. J. McDaid, S. Hall, P. H. Mellor, W. Eccleston, and J. C. Alderman, "Physical origin of negative differential resistance in SOI transistors," Electron. Lett., vol. 25, pp. 827-828, June 1989.
2. O. L. Neel and H. Haond, "Electrical transient study of negative resistance in SOI MOS transistors," Electron. Lett., vol. 26, no. 1, pp. 73-74, 1990.
3. R. J. T. Bunyan, M. J. Uren, J. C. Alderman, and W. Eccleston, "Use of noise-thermometry to study the effects of self-heating in submicrometer SOI MOSFET's," IEEE Electron Device Lett., vol. 13, pp. 279-281, May 1992.
4. A. L. Caviglia and A. A. Iliadis, "Linear dynamic self-heating in SOI MOSFET's," IEEE Electron Device Lett., vol. 14, pp. 133-135, Mar. 1993.
5. L. T. Su, J. E. Chung, D. A. Antoniadis, K. E. Goodson, and M. I. Flik, "Measurement and modeling of self-heating in SOI NMOSFET's," IEEE Trans. Electron Devices, vol. 41, pp. 69-74, Jan. 1994.
6. B. M. Tenbroek, M. S. L. Lee, W. Redman-White, R. J. T. Bunyan, and M. J. Uren, "Self-heating effects in SOI MOSFET's and their measurement by small signal conductance techniques," IEEE Trans. Electron Devices, vol. 43, pp. 2240-2248, Dec. 1996.
7. M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, "Matching properties of MOS-transistors," IEEE J. Solid-State Circuits, vol. 24, pp. 1433-1440, May 1989.
8. S. Cristoloveanu and A. S. Li, Electrical Characterization of Silicon-on-Insulator Materials and Devices. Norwell, MA: Kluwer Academic, 1995.
9. J.-P. Colinge, Silicon-on-Insulator Technology: Materials to VLSI. Norwell, MA: Kluwer Academic, 1991.
10. M. S. L. Lee, W. Redman-White, B. M. Tenbroek, and M. Robinson, "Modelling of thin film SOI devices for circuit simulation including per-instance dynamic self-heating effects," in Proc. IEEE Int. SOI Conference, Palm Springs, CA, Oct. 1993, pp. 150-151.
11. S. M. Sze, Physics of Semiconductor Devices, 2nd ed. New York: Wiley, 1981.
12. D. K. Sharma and K. V. Ramanathan, "Modeling thermal effects on MOS I-V characteristics," IEEE Electron Device Lett., vol. 4, pp. 362-364, Oct. 1983.
13. N. Yasuda, S. Ueno, K. Taniguchi. C. Hamaguchi, Y. Yamaguchi, and T. Nishimura, "Analytical device model of SOI MOSFET's including self-heating effect," Jpn. J. Appl. Phys., Part 1-Regular Papers, Short Notes & Review Papers, vol. 30, pp. 3677-3684, Dec. 1991.
14. N. Arora, MOSFET Models for VLSI Circuit Simulation (Computational Microelectronics Series). Wien: Springer-Verlag, 1993.
15. M. S. L. Lee, "Compact modelling of partially depleted silicon-on-insulator MOSFET's for analog circuit simulation," Ph.D. dissertation, Dept. Electron. Comput. Sci., Univ. Southampton, Southampton, U.K., 1998.
16. B. M. Tenbroek, W. Redman-White, M. S. L. Lee, R. J. T. Bunyan, and M. J. Uren, "Characterization of geometry dependence of SOI MOSFET thermal resistance and capacitance parameters," in Proc. IEEE Int. SOI Conf., Fish Camp, CA, Oct. 1997, pp. 114-115.
17. W. Redman-White, M. J. Uren, R. J. T. Bunyan, R. Howes, M. Lee, and J. C. Alderman, "Electrical and thermal feedback effects on the small-signal characteristics of partially depleted SOI MOSFET's," in Proc. IEEE Int. SOI Conf., 1992, pp. 122-123.
18. B. M. Tenbroek, W. Redman-White, M. S. L. Lee, R. J. T. Bunyan, M. J. Uren, and K. M. Brunson, "Characterization of layout dependent thermal coupling in SOI CMOS current mirrors," IEEE Trans. Electron Devices, vol. 43, pp. 2227-2232, Dec. 1996.