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Volumn 47, Issue 12, 2000, Pages 2372-2378

Short channel epi-MOSFET model

Author keywords

Epi mosfet; Scaling theory; Short channel effects

Indexed keywords


EID: 0041346978     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.887024     Document Type: Article
Times cited : (12)

References (33)
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    • 0.1 ftm CMOS technology with 11.8 ps gate delay," in 1EDM Tech. Dig., 1993, pp. 131-134.
    • K. F. Lee et al, "Room temperature 0.1 ftm CMOS technology with 11.8 ps gate delay," in 1EDM Tech. Dig., 1993, pp. 131-134.
    • "Room Temperature
    • Lee, K.F.1
  • 3
    • 0025578245 scopus 로고    scopus 로고
    • etal., 0.1 μm CMOS devices using low-impurity-channel transistors (LICT)," in IEDM Tech. Dig., 1990, pp. 939-941.
    • M. Aoki etal., "0.1 μm CMOS devices using low-impurity-channel transistors (LICT)," in IEDM Tech. Dig., 1990, pp. 939-941.
    • "
    • Aoki, M.1
  • 4
    • 0032671606 scopus 로고    scopus 로고
    • 0.IS-ftm CMOS for mixed digital and analog applications with zero-volt- Vth epitaxial-channel MOSFET's," IEEE Trans. Electron Devices, vol. 46, pp. 1378-1383, July 1999.
    • T. Ohguro et al, "An 0.IS-ftm CMOS for mixed digital and analog applications with zero-volt- Vth epitaxial-channel MOSFET's," IEEE Trans. Electron Devices, vol. 46, pp. 1378-1383, July 1999.
    • "An
    • Ohguro, T.1
  • 24
    • 0033739984 scopus 로고    scopus 로고
    • IEEE Trans. Electron Devices, vol. 47, pp. 1202-1208, June 2000.
    • K. Suzuki, "Scaling theory for bulk MOSFET," IEEE Trans. Electron Devices, vol. 47, pp. 1202-1208, June 2000.
    • "Scaling Theory for Bulk MOSFET,"
    • Suzuki, K.1
  • 25
    • 33747428893 scopus 로고    scopus 로고
    • MOSFET Models for VLSI Circuit Simulation. Berlin, Germany: Springer-Verlag, 1993.
    • N. Arora, MOSFET Models for VLSI Circuit Simulation. Berlin, Germany: Springer-Verlag, 1993.
    • Arora, N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.