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Volumn 39, Issue 7, 1992, Pages 1704-1710

Scaling the Si MOSFET: From Bulk to SOI to Bulk

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTING SILICON--DOPING;

EID: 0026896303     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.141237     Document Type: Article
Times cited : (768)

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  • 6
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    • Sabnis, A.G.1    Clemens, J.T.2
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    • M. R. Polcari. H. Y. Ng, P. J. Restle, T. H. P. Chang, and R. H. Dennard
    • G. A. Sai-Halasz, M. R. Wordeman, D. P. Kern, E. Ganin, S. Rishton, D. S. Zicherman, H. Schmid. M. R. Polcari. H. Y. Ng, P. J. Restle, T. H. P. Chang, and R. H. Dennard, “Design and experimental technology for 0.1 μm gate-length low-temperature operation FET’s,” IEEE Electron Device Lett., vol. EDL-8, 463, 1987.
    • (1987) IEEE Electron Device Lett. , vol.EDL-8 , Issue.463
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  • 12
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.