Impact of Shallow Source/Drain on the Short-Channel Characteristics of pMOSFET's

IEEE Electron Device Letters

Volumn 20, Issue 2, 1999, Pages 95-96

  Kurata, Hajime ^a   Sugii, Toshihiro ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

MOSFET's; Semiconductor device doping; Semiconductor device measurements; Semiconductor junctions

Indexed keywords

DIFFUSION IN SOLIDS; ELECTRIC CURRENTS; GATES (TRANSISTOR); SEMICONDUCTING BORON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS; THRESHOLD VOLTAGE;

SHALLOW JUNCTIONS;

MOSFET DEVICES;

EID: 0033079719     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.740663     Document Type: Article

References (5)

1. M. Saito, T. Yoshitomi, H. Hara, M. Ono, Y. Akasaka, H. Nii, S. Matsuda, H. S. Momose, Y. Katsumata, Y. Ushiku, and H. Iwai, "P-MOSFET's with ultra-shallow solid-phase-diffused drain structure produced by diffusion from BSG gate-sidewall," IEEE Trans. Electron Devices, vol. 40, p. 2264, Dec. 1993.
2. K. K. Ng, S. A. Eshraghi, and T. D. Stanik, "An improved generalized guide for MOSFET scaling," IEEE Trans. Electron Devices, vol. 40, p. 1895, Oct. 1993.
3. H. Kurata and T. Sugii, "Impact of shallow source/drain on scaling pMOSFET's below 0.1 μm," in Ext. Abst. Solid Slate Dev. Mater., 1997, p. 502.
4. Y. Taur, D. S. Zicherman, D. R. Lombardi, P. J. Restle, C. H. Hsu, H. I. Hanafi, M. R. Wordeman, B. Davari, and G. G. Shahidi, "A new 'shift and ratio' method for MOSFET channel-length extraction," IEEE Electron Device Lett., vol. 13, p. 267, May 1992.
5. G. J. Hu, C. Chang, and Y. Chia, "Gate-voltage-dependent effective channel length and series resistance of LDD MOSFET's," IEEE Trans. Electron Devices, vol. ED-34, p. 2469, Dec. 1987.