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Volumn 9, Issue 3, 2013, Pages 1613-1624

QoS-driven reconfigurable parallel computing for NoC-based clustered MPSoCs

Author keywords

Networks on chip (NoCs); NoC based multiprocessor systems on chip (MPSoC); parallel computing; quality of service (QoS); runtime reconfiguration

Indexed keywords

APPLICATION REQUIREMENTS; EMBEDDED COMPUTING; HARDWARE COMPLEXITY; MULTIPLE APPLICATIONS; MULTIPROCESSOR SYSTEMS ON CHIPS; NETWORK ON CHIP; NETWORKS ON CHIPS; RUN TIME RECONFIGURATION;

EID: 84882755575     PISSN: 15513203     EISSN: None     Source Type: Journal    
DOI: 10.1109/TII.2012.2222035     Document Type: Article
Times cited : (14)

References (54)
  • 1
    • 34547261834 scopus 로고    scopus 로고
    • Thousand core chips - A technology perspective
    • DOI 10.1109/DAC.2007.375263, 4261282, 2007 44th ACM/IEEE Design Automation Conference, DAC'07
    • S. Borkar, "Thousand core chips: A technology perspective," in Proc. 44th Annu. Design Automation Conf. (DAC), 2007, pp. 746-749. (Pubitemid 47130064)
    • (2007) Proceedings - Design Automation Conference , pp. 746-749
    • Borkar, S.1
  • 3
    • 78149464485 scopus 로고    scopus 로고
    • A cross-domain multiprocessor system-on - A-chip for embedded real-time systems
    • Nov.
    • R. Obermaisser, H. Kopetz, and C. Paukovits, "A cross-domain multiprocessor system-on-a-chip for embedded real-time systems," IEEE Trans. Ind. Inf., vol. 6, no. 4, pp. 548-567, Nov. 2010.
    • (2010) IEEE Trans. Ind. Inf. , vol.6 , Issue.4 , pp. 548-567
    • Obermaisser, R.1    Kopetz, H.2    Paukovits, C.3
  • 5
    • 85008053864 scopus 로고    scopus 로고
    • An 80-tile sub-100-W TeraFLOPS processor in 65-nm CMOS
    • Jan.
    • S. R. Vangal et al., "An 80-tile sub-100-W TeraFLOPS processor in 65-nm CMOS," IEEE J. Solid-State Circuits, vol. 43, no. 1, pp. 29-41, Jan. 2008.
    • (2008) IEEE J. Solid-State Circuits , vol.43 , Issue.1 , pp. 29-41
    • Vangal, S.R.1
  • 8
    • 84882747331 scopus 로고    scopus 로고
    • AMBA 3 AXI overview ARM Ltd., (2005). [Online]. Available: http://www.arm.com/products/system-ip/interconnect/axi/index.php
    • (2005) AMBA 3 AXI Overview ARM Ltd.
  • 9
    • 33646939186 scopus 로고    scopus 로고
    • OCP International Partnership (OCPIP)
    • Open Core Protocol Standard OCP International Partnership (OCPIP), (2003). [Online]. Available: http://www.ocpip.org/home
    • (2003) Open Core Protocol Standard
  • 10
    • 0002806690 scopus 로고    scopus 로고
    • OpenMP: An industry standard API for shared-memory programming
    • L. Dagum and R. Menon, "OpenMP: An industry standard API for shared-memory programming," IEEE Comput. Sci. Eng., vol. 5, no. 1, pp. 46-55, 1998.
    • (1998) IEEE Comput. Sci. Eng. , vol.5 , Issue.1 , pp. 46-55
    • Dagum, L.1    Menon, R.2
  • 12
    • 63149128672 scopus 로고    scopus 로고
    • Larrabee: A many-core x86 architecture for visual computing
    • Jan.
    • L. Seiler et al., "Larrabee: A many-core x86 architecture for visual computing," IEEE Micro, vol. 29, no. 1, pp. 10-21, Jan. 2009.
    • (2009) IEEE Micro , vol.29 , Issue.1 , pp. 10-21
    • Seiler, L.1
  • 13
    • 77951154340 scopus 로고    scopus 로고
    • The GPU computing era
    • Mar./Apr.
    • J. Nickolls andW. Dally, "The GPU computing era," IEEE Micro, vol. 30, no. 2, pp. 56-69, Mar./Apr. 2010.
    • (2010) IEEE Micro , vol.30 , Issue.2 , pp. 56-69
    • Nickoll, J.1    Dally, W.2
  • 14
    • 60349104720 scopus 로고    scopus 로고
    • CoMPSoC: A template for composable and predictable multi-processor system on chips
    • A. Hansson, K. Goossens, M. Bekooij, and J. Huisken, "CoMPSoC: A template for composable and predictable multi-processor system on chips," ACM Trans. Des. Autom. Electron. Syst., vol. 14, no. 1, pp. 1-24, 2009.
    • (2009) ACM Trans. Des. Autom. Electron. Syst. , vol.14 , Issue.1 , pp. 1-24
    • Hansson, A.1    Goossens, K.2    Bekooij, M.3    Huisken, J.4
  • 17
    • 34547326027 scopus 로고    scopus 로고
    • Introducing the SuperGT network- on-chip; SuperGT QoS: More than just GT
    • Jun. 4-8
    • T. Marescaux and H. Corporaal, "Introducing the SuperGT network- on-chip; SuperGT QoS: More than just GT," in Proc. 44th ACM/IEEE Design Automat. Conf. (DAC), Jun. 4-8, 2007, pp. 116-121.
    • (2007) Proc. 44th ACM/ IEEE Design Automat. Conf. (DAC) , pp. 116-121
    • Marescaux, T.1    Corporaal, H.2
  • 19
    • 1242309790 scopus 로고    scopus 로고
    • QNoC: QoS architecture and design process for network on chip
    • E. Bolotin, I. Cidon, R. Ginosar, and A. Kolodny, "QNoC: QoS architecture and design process for network on chip," J. Syst. Archit., vol. 50, pp. 105-128, 2004.
    • (2004) J. Syst. Archit. , vol.50 , pp. 105-128
    • Bolotin, E.1    Cidon, I.2    Ginosar, R.3    Kolodny, A.4
  • 20
    • 79953203158 scopus 로고    scopus 로고
    • CoQoS: Coordinating QoS-aware shared resources in NoC-based SoCs
    • May
    • B. Li et al., "CoQoS: Coordinating QoS-aware shared resources in NoC-based SoCs," J. Parallel Distrib. Comput., vol. 71, pp. 700-713, May 2011.
    • (2011) J. Parallel Distrib. Comput. , vol.71 , pp. 700-713
    • Li, B.1
  • 22
    • 36349003412 scopus 로고    scopus 로고
    • Trade-offs in the configuration of a network on chip for multiple use-cases
    • DOI 10.1109/NOCS.2007.45, 4209017, Proceedings - NOCS 2007: First International Symposium on Networks-on-Chip
    • A. Hansson and K. Goossens, "Trade-offs in the configuration of a network on chip for multiple use-cases," in NOCS '07: Proc. First Int. Symp. Networks-on-Chip, 2007, pp. 233-242. (Pubitemid 350153601)
    • (2007) Proceedings - NOCS 2007: First International Symposium on Networks-on-Chip , pp. 233-242
    • Hansson, A.1    Goossens, K.2
  • 23
    • 78149464618 scopus 로고    scopus 로고
    • On the integration of application level and resource level QoS control for realtime applications
    • Nov.
    • T. Cucinotta, L. Palopoli, L. Abeni, D. Faggioli, and G. Lipari, "On the integration of application level and resource level QoS control for realtime applications," IEEE Trans. Ind. Inf., vol. 6, no. 4, pp. 479-491, Nov. 2010.
    • (2010) IEEE Trans. Ind. Inf. , vol.6 , Issue.4 , pp. 479-491
    • Cucinotta, T.1    Palopoli, L.2    Abeni, L.3    Faggioli, D.4    Lipari, G.5
  • 26
    • 84944729215 scopus 로고    scopus 로고
    • Extending OpenMP for heterogeneous chip multiprocessors
    • F. Liu and V. Chaudhary, "Extending OpenMP for heterogeneous chip multiprocessors," in Proc. Int. Conf. Parallel Process., 2003, pp. 161-168.
    • (2003) Proc. Int. Conf. Parallel Process. , pp. 161-168
    • Liu, F.1    Chaudhary, V.2
  • 27
    • 70350060174 scopus 로고    scopus 로고
    • Efficient OpenMP support and extensions forMPSoCs with explicitly managed memory hierarchy
    • Apr. 20-24
    • A. Marongiu and L. Benini, "Efficient OpenMP support and extensions forMPSoCs with explicitly managed memory hierarchy," in Proc. Design, Automat. Test Eur. Conf.. Exhib. (DATE), Apr. 20-24, 2009, pp. 809-814.
    • (2009) Proc. Design, Automat. Test Eur. Conf.. Exhib. (DATE) , pp. 809-814
    • Marongiu, A.1    Benini, L.2
  • 30
    • 46649083626 scopus 로고    scopus 로고
    • Effective OpenMP implementation and translation for multiprocessor system-on-chip without using OS
    • Jan. 23-26
    • W.-C. Jeun and S. Ha, "Effective OpenMP implementation and translation for multiprocessor system-on-chip without using OS," in Proc. Asia South Pac. Design Automat. Conf. (ASP-DAC), Jan. 23-26, 2007, pp. 44-49.
    • (2007) Proc. Asia South Pac. Design Automat. Conf. (ASP-DAC) , pp. 44-49
    • Jeun, W.-C.1    Ha, S.2
  • 32
    • 84856529095 scopus 로고    scopus 로고
    • Light-weight communications on Intel's single-chip cloud computer processor
    • Feb.
    • R. F. van der Wijngaart, T. G. Mattson, and W. Haas, "Light-weight communications on Intel's single-chip cloud computer processor," SIGOPS Oper. Syst. Rev., vol. 45, pp. 73-83, Feb. 2011.
    • (2011) SIGOPS Oper. Syst. Rev. , vol.45 , pp. 73-83
    • Der Van Wijngaart, R.F.1    Mattson, T.G.2    Haas, W.3
  • 33
    • 33646596525 scopus 로고    scopus 로고
    • MPI microtask for programming the cell broadband engine processor
    • M. Ohara, H. Inoue, Y. Sohda, H. Komatsu, and T. Nakatani, "MPI microtask for programming the cell broadband engine processor," IBM Syst. J., vol. 45, no. 1, pp. 85-102, 2006.
    • (2006) IBM Syst. J. , vol.45 , Issue.1 , pp. 85-102
    • Ohara, M.1    Inoue, H.2    Sohda, Y.3    Komatsu, H.4    Nakatani, T.5
  • 34
    • 50049099419 scopus 로고    scopus 로고
    • RMPI: Message passing on multicore processors with on-chip interconnect
    • J. Psota and A. Agarwal, "rMPI: Message passing on multicore processors with on-chip interconnect," Lecture Notes Comput. Sci., vol. 4917, pp. 22-22, 2008.
    • (2008) Lecture Notes Comput. Sci. , vol.4917 , pp. 22-22
    • Psota, J.1    Agarwal, A.2
  • 35
    • 46249129709 scopus 로고    scopus 로고
    • TMD-MPI: An MPI implementation for multiple processors across multiple FPGAs
    • Aug.
    • M. Saldaña and P. Chow, "TMD-MPI: An MPI implementation for multiple processors across multiple FPGAs," in Proc. Int. Conf. Field Program. Logic Appl. (FPL), Aug. 2006, pp. 1-6.
    • (2006) Proc. Int. Conf. Field Program. Logic Appl. (FPL) , pp. 1-6
    • Saldaña, M.1    Chow, P.2
  • 43
    • 4043150092 scopus 로고    scopus 로고
    • Xpipes: A network-on-chip architecture for gigascale systems-on-chip
    • D. Bertozzi and L. Benini, "Xpipes: A network-on-chip architecture for gigascale systems-on-chip," IEEE Circuits Syst. Mag., vol. 4, no. 2, pp. 18-31, 2004.
    • (2004) IEEE Circuits Syst. Mag. , vol.4 , Issue.2 , pp. 18-31
    • Bertozzi, D.1    Benini, L.2
  • 45
    • 0002789358 scopus 로고    scopus 로고
    • MPI: A standard message passing interface
    • D. W. Walker and J. J. Dongarra, "MPI: A standard message passing interface," Supercomputer, vol. 12, pp. 56-68, 1996. (Pubitemid 126796011)
    • (1996) Supercomputer , vol.12 , Issue.1 , pp. 56-68
    • Walker, D.W.1    Dongarra, J.J.2
  • 47
    • 84882737115 scopus 로고    scopus 로고
    • Open MPI: Open Source High Performance Computing
    • Open MPI: Open Source High Performance Computing (2004). [Online]. Available: http://www.open-mpi.org/
    • (2004)
  • 51
    • 0002438680 scopus 로고    scopus 로고
    • VAMPIR: Visualization and analysis of MPI resources
    • W. E. Nagel, A. Arnold, M.Weber, H.-C. Hoppe, and K. Solchenbach, "VAMPIR: Visualization and analysis of MPI resources," Supercomputer, vol. 12, pp. 69-80, 1996. (Pubitemid 126796012)
    • (1996) Supercomputer , vol.12 , Issue.1 , pp. 69-80
    • Nagel, W.E.1    Arnold, A.2    Weber, M.3    Hoppe, H.-Ch.4    Solchenbach, K.5
  • 53
    • 35048819090 scopus 로고    scopus 로고
    • ParaProf: A Portable, Extensible, and Scalable Tool for Parallel Performance Profile Analysis
    • Euro-Par 2003 Parallel Processing 9th International Euro-Par Conference Klagenfurt, Austria, August 26-29, 2003 Proceedings
    • R. Bell, A. Malony, and S. Shende, "ParaProf: A portable, extensible, and scalable tool for parallel performance profile analysis," Euro-Par Parallel Process., vol. 2790, pp. 17-26, 2003. (Pubitemid 37223813)
    • (2003) Lecture Notes In Computer Science , Issue.2790 , pp. 17-26
    • Bell, R.1    Malony, A.D.2    Shende, S.3
  • 54
    • 12444297460 scopus 로고    scopus 로고
    • Precise MPI performance measurement using MPIBench
    • D. Grove and P. Coddington, "Precise MPI performance measurement using MPIBench," in Proc. HPC Asia, 2001.
    • (2001) Proc. HPC Asia
    • Grove, D.1    Coddington, P.2


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