HW-SW implementation of a decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs

SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings

Volumn , Issue , 2011, Pages 1-8

  Joven, Jaume ^a   Strict, Per ^a   Castells Rufas, David ^a   Bagdia, Akash ^a   De Micheli, Giovanni ^a   Carrabina, Jordi ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPLEX SOFTWARE APPLICATIONS; DOUBLE PRECISION; FLOATING POINT OPERATIONS; FLOATING POINT UNITS; HARDWARE-ASSISTED; IEEE-754; IP CORE; MULTI PROCESSOR SYSTEMS; SOC ARCHITECTURE; SOFTWARE ACCELERATION; SOFTWARE APPLICATIONS;

COMPUTER ARCHITECTURE; DESIGN; DIGITAL ARITHMETIC; EMBEDDED SOFTWARE; INDUSTRY; MICROPROCESSOR CHIPS; PROGRAM COMPILERS; SOFTWARE TESTING;

EMBEDDED SYSTEMS;

EID: 80051998716     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIES.2011.5953649     Document Type: Conference Paper

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