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Volumn , Issue , 2011, Pages 7-12

Adaptive multi-client network-on-chip memory

Author keywords

Adaptive Memory Controller; FPGA; Multiprocessor System on Chip; Network on Chip; Reconfigurable Computing

Indexed keywords

ADAPTIVE MEMORY; ADDRESS SPACE; DYNAMIC MAPPING; HETEROGENEOUS DATA; MULTI PROCESSOR SYSTEMS; MULTIPROCESSOR SYSTEM ON CHIPS; NETWORK ON CHIP; OFF-CHIP MEMORIES; ON CHIP MEMORY; PHYSICAL CHANNELS; PROCESSING NODES; RE-CONFIGURABLE; RECONFIGURABLE COMPUTING; SYSTEM ON CHIPS; TRANSFER MODES;

EID: 84856817370     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ReConFig.2011.8     Document Type: Conference Paper
Times cited : (12)

References (7)
  • 1
    • 84856924443 scopus 로고    scopus 로고
    • Adaptive Multiprocessor System-on-Chip Architecture - New degrees of freedom in system design and runtime support
    • Book chapter in Springer, Nov.
    • D. Göhringer, M. Hübner, J. Becker: "Adaptive Multiprocessor System-on-Chip Architecture - New degrees of freedom in system design and runtime support"; Book chapter in "Multiprocessor System-on-Chip: Current Trends and the Future"; Springer, Nov. 2010.
    • (2010) Multiprocessor System-on-Chip: Current Trends and the Future
    • Göhringer, D.1    Hübner, M.2    Becker, J.3
  • 6
    • 80155210613 scopus 로고    scopus 로고
    • Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip
    • July
    • D. Göhringer, O. Oey, M. Hübner, J. Becker: "Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip"; SAMOS 2011, July 2011.
    • (2011) SAMOS 2011
    • Göhringer, D.1    Oey, O.2    Hübner, M.3    Becker, J.4
  • 7
    • 77954076823 scopus 로고    scopus 로고
    • DS449, June 25, Available at
    • Xilinx: "Fast Simplex Link (FSL) Bus (v2.11a)"; DS449, June 25, 2007. Available at http://www.xilinx.com.
    • (2007) Fast Simplex Link (FSL) Bus (V2.11a)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.