Accelerating microprocessor silicon validation by exposing ISA diversity

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2011, Pages 386-397

  Foutris, Nikos ^a   Gizopoulos, Dimitris ^a   Psarakis, Mihalis ^b   Vera, Xavier ^c   Gonzalez, Antonio ^c  

^a UNIVERSITY OF ATHENS   (Greece)

^b UNIVERSITY OF PIRAEUS   (Greece)

^c INTEL CORPORATION   (United States)

Author keywords

design debug; ISA diversity; microprocessor silicon validation

Indexed keywords

BUG DETECTION; BUG-FREE; DESIGN DEBUG; ISA DIVERSITY; ITS EFFICIENCIES; LIGHT WEIGHT; MICROPROCESSOR DESIGNS; POST-SILICON; POWERPC; RANDOM TESTS; SELF CHECKING; SILICON IMAGES; SIMULATION-BASED; TIME-TO-MARKET; VALIDATION PROCESS;

INTEGRATED CIRCUIT TESTING; MODEL CHECKING; TESTING;

MICROPROCESSOR CHIPS;

EID: 84858775392     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2155620.2155666     Document Type: Conference Paper

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