Postsilicon validation methodology for microprocessors

IEEE Design and Test of Computers

Volumn 17, Issue 4, 2000, Pages 77-88

  Rotithor, Hemant ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPUTER HARDWARE; COMPUTER SIMULATION;

MICROARCHITECHTURE TESTS; POSTSILICON ERRORS;

MICROPROCESSOR CHIPS;

EID: 0034292073     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.895008     Document Type: Article

References (19)

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