A unified methodology for pre-silicon verification and post-silicon validation

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2011, Pages 1590-1595

  Adir, Allon ^a   Copty, Shady ^a   Landa, Shimon ^a   Nahir, Amir ^a   Shurek, Gil ^a   Ziv, Avi ^a   Meissner, Charles ^b   Schumann, John ^b  

^a IBM RESEARCH   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COVERAGE MODELS; FUNCTIONAL VERIFICATION; GENERATION TOOLS; POST-SILICON; PROCESSOR CHIPS; UNIFIED METHODOLOGY;

DESIGN;

EID: 79957542190     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

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