Processor verification with hwBugHunt

Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008

Volumn , Issue , 2008, Pages 224-229

  Sudhakrishnan, Sangeetha ^a   Su, Liying ^a   Renau, Jose ^a  

^a University of California Santa Cruz   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASIC DESIGNS; CHALLENGING TASK; COMPLEX DESIGNS; ELECTRONIC DESIGNS; FUNCTIONAL VERIFICATIONS; HIGH-ACCURACY; INTERNATIONAL SYMPOSIUM; LINE OF CODE; LOW OVERHEAD; MODERN PROCESSORS; NEW TOOLS; PROCESSOR VERIFICATION; TEST SUITES; TEST-BENCHES; VERIFICATION PROCESSES; VERILOG; VERILOG CODE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CHLORINE COMPOUNDS; CODES (SYMBOLS); ELECTRONICS ENGINEERING; INTEGRATED CIRCUITS;

CODES (STANDARDS);

EID: 49749133945     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2008.4479730     Document Type: Conference Paper

References (12)

1. H. Al-Asaad, D.V. Campenhout, J.P. Hayes, T. Mudge, and R. Brown. High-Level Design Verification of Microprocessors via Error Modeling. In IEEE International High-Level Design Validation and Test Workshop, pages 194-201, 1997.
2. M. Fahim Ali, A. Veneris, A. Smith, S. Safarpour, R. Drechsler, and M. Abadir. Debugging sequential circuits using boolean satisfiability. In ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, pages 204-209, Washington, DC, USA, 2004. IEEE Computer Society.
3. Semiconductor Industry Association. International Technology Roadmap for Semiconductors (ITRS), 2002.
4. D. Burger, T.M. Austin, and S. Bennett. Evaluating future microprocessors: The simplescalar tool set. Technical Report CSTR-1996-1308, 1996.
5. M.D. Ernst, A. Czeisler, W.G. Griswold, and D. Notkin. Quickly detecting relevant program invariants. In ICSE '00: Proceedings of the 22nd international conference on Software engineering, pages 449-458, New York, NY, USA, 2000. ACM Press.
6. Görschwin Fey, Sean Safarpour, Andreas Veneris, and Rolf Drechsler. On the relation between simulation-based and sat- based diagnosis. In DATE '06: Proceedings of the conference on Design, automation and test in Europe, pages 1139-1144, 3001 Leuven, Belgium, Belgium, 2006. European Design and Automation Association.
7. R. Goodall, D. Fandel, A. Allan, P. Landler, and H. R. Huff. Long Term Productivity Mechanisms of the Semiconductor Industry. www.sematech.org, 2002.
8. S. Hangal, N. Chandra, S. Narayanan, and S. Chakravorty. Iodine: a tool to automatically infer dynamic invariants for hardware designs. In DAC '05: Proceedings of the 42nd annual conference on Design automation, pages 775-778, New York, NY, USA, 2005. ACM Press.
9. S. Hangal and M.S. Lam. Tracking down software bugs using automatic anomaly detection. In ICSE '02: Proceedings of the 24th International Conference on Software Engineering, pages 291-301, New York, NY, USA, 2002. ACM Press.
10. Collett International. 2003 IC/ASIC Design Closure Study, 2003.
11. R. Liang. Personal communication. Sun Microsystems, 2006.
12. N.J. Wang, J. Quek, T.M. Rafacz, and S.J. Patel. Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline. In International Conference on Dependable Systems and Networks. IEEE Computer Society, Jun 2004.