Quantum confinement induced performance enhancement in sub-5-nm lithographic Si nanowire transistors

Nano Letters

Volumn 11, Issue 4, 2011, Pages 1412-1417

  Trivedi, Krutarth ^a   Yuk, Hyungsang ^a   Floresca, Herman Carlo ^a   Kim, Moon J ^a   Hu, Walter ^a  

^a The University of Texas at Dallas   (United States)

Author keywords

FETs; mobility; nanobelt; Nanowire; quantum confinement

Indexed keywords

BIOSENSING; CHANNEL DOPINGS; CMOS SCALING; DRAIN LEAKAGE CURRENT; DRIVE CURRENTS; EMERGING APPLICATIONS; ENHANCED PERFORMANCE; FETS; MOBILITY; NANOWIRE FET; ON/OFF RATIO; PERFORMANCE ENHANCEMENTS; POTENTIAL IMPACTS; SI NANOWIRE; TOPDOWN;

DOPING (ADDITIVES); DRAIN CURRENT; FIELD EFFECT TRANSISTORS; HOLE MOBILITY; LEAKAGE CURRENTS; MESFET DEVICES; NANOBELTS; QUANTUM CONFINEMENT; SILICON;

NANOWIRES;

NANOMATERIAL; SILICON;

ARTICLE; CHEMISTRY; EQUIPMENT; EQUIPMENT DESIGN; METHODOLOGY; PARTICLE SIZE; PHOTOGRAPHY; QUANTUM THEORY; SEMICONDUCTOR; ULTRASTRUCTURE;

EQUIPMENT DESIGN; EQUIPMENT FAILURE ANALYSIS; NANOSTRUCTURES; PARTICLE SIZE; PHOTOGRAPHY; QUANTUM THEORY; SILICON; TRANSISTORS, ELECTRONIC;

EID: 79954522582     PISSN: 15306984     EISSN: 15306992     Source Type: Journal    
DOI: 10.1021/nl103278a     Document Type: Article

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