SILC decay in La2O3 gate dielectrics grown on Ge substrates subjected to constant voltage stress

Solid-State Electronics

Volumn 54, Issue 9, 2010, Pages 979-984

  Rahman, M S ^a,b   Evangelou, E K ^b   Androulidakis, I I ^b   Dimoulas, A ^c   Mavrou, G ^c   Galata, S ^c  

^a GSI HELMHOLTZZENTRUM FÜR SCHWERIONENFORSCHUNG GMBH   (Germany)

^b UNIVERSITY OF IOANNINA   (Greece)

^c INSTITUTE OF MATERIALS SCIENCE   (Greece)

Author keywords

Charge trapping; CVS; Defects generation; Dielectric relaxation; Ge substrates; La 2O3; Rare earth oxides; SILC

Indexed keywords

BULK OXIDES; CHARGE TRAPPING CHARACTERISTICS; CONSTANT VOLTAGE STRESS; CONTINUOUS DISTRIBUTION; CVS; DEFECTS GENERATION; ELECTRON CHARGE; EXPERIMENTAL DATA; GATE VOLTAGES; GE SUBSTRATES; HIGH FREQUENCY CAPACITANCE; POSITIVELY CHARGED; POWER LAW; RARE EARTH OXIDE; SHORT TIME INTERVALS; STRESS-INDUCED LEAKAGE CURRENT;

CHARGE TRAPPING; DIELECTRIC MATERIALS; DIELECTRIC RELAXATION; GATE DIELECTRICS; GATES (TRANSISTOR); GERMANIUM; MOS DEVICES;

LEAKAGE (FLUID);

EID: 77954213723     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2010.04.023     Document Type: Conference Paper

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