Design techniques for cross-layer resilience

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2010, Pages 1023-1028

  Carter, Nicholas P ^a   Naeimi, Helia ^a   Gardner, Donald S ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; PROGRAMMABLE LOGIC CONTROLLERS; SOFTWARE RELIABILITY; SYSTEM-ON-CHIP;

DEVICE VARIATIONS; ELECTRONIC SYSTEMS; FABRICATION PROCESS; GENERAL-PURPOSE COMPUTING; LOW-POWER SYSTEMS; RELIABILITY GUARANTEE; RESILIENT SYSTEMS; TASK BASED DESIGN;

INTEGRATED CIRCUIT DESIGN;

EID: 77953105145     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2010.5456960     Document Type: Conference Paper

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