AR-SMT: a microarchitectural approach to fault tolerance in microprocessors

Proceedings - Annual International Conference on Fault-Tolerant Computing

Volumn , Issue , 1999, Pages 84-91

  Rotenberg, Eric ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; COMPUTER SOFTWARE; GENERAL PURPOSE COMPUTERS; MICROPROCESSOR CHIPS; PERFORMANCE; REDUNDANCY;

ACTIVE REDUNDANT STREAM SIMULTANEOUS MULTITHREADING; FAULT TOLERANCE; TRANSIENT FAULTS;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0032597692     PISSN: 07313071     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (24)