Total ionizing dose effects on strained HfO2-based nMOSFETs

IEEE Transactions on Nuclear Science

Volumn 55, Issue 6, 2008, Pages 2981-2985

  Park, Hyunwoo ^a   Dixit, Sriram K ^b,c   Choi, Youn Sung ^a   Schrimpf, Ronald D ^d   Fleetwood, Daniel M ^d   Nishida, Toshikazu ^a   Thompson, Scott E ^a  

^a University of Florida   (United States)

^b VANDERBILT UNIVERSITY   (United States)

^c INTEL CORPORATION   (United States)

^d VANDERBILT UNIVERSITY   (United States)

Author keywords

Hafnium oxide HfO2; High k; Metal oxide semiconductor field effect transistors (MOSFETs); Radiation damage; Strained silicon; Uniaxial; X ray

Indexed keywords

HAFNIUM OXIDE HFO2; HIGH-K; METAL-OXIDE-SEMICONDUCTOR-FIELD-EFFECT- TRANSISTORS (MOSFETS); STRAINED-SILICON; UNIAXIAL; X-RAY;

CHARGE TRAPPING; DIELECTRIC DEVICES; ELECTRIC BREAKDOWN; ELECTRIC CONDUCTIVITY; FIELD EFFECT TRANSISTORS; HAFNIUM; HAFNIUM COMPOUNDS; HOLE MOBILITY; IONIZING RADIATION; MOSFET DEVICES; OXIDES; PHOTODEGRADATION; RADIATION DAMAGE; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR MATERIALS; TENSILE STRENGTH; TRANSISTORS;

STRESSES;

EID: 58849142519     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2008.2006837     Document Type: Conference Paper

References (34)

1. V. Chan, R. Rengarajan, N. Rovedo, W. Jin, T. Hook, P. Nguyen, J. Chen, E. Nowak, X.-D. Chen, D. Lea, A. Chakravarti, V. Ku, S. Yang, A. Steegen, C. Baiocco, P. Shafer, H. Ng, S.-F. Huang, and C. Wann, "High speed 45 nm gate length CMOSFETs integrated into a 90 nm bulk technology incorporating strain engineering," in Proc. IEDM Tech. Dig., 2003, pp. 3.8.1-3.8.4.
2. 2 SRAM cell," in Proc. IEDM Tech. Dig., 2002, pp. 61-64.
3. J. Robertson, "High dielectric constant gate oxides for metal oxide Si transistors," Reports Progress in Physics, vol. 69, pp. 327-396, Feb. 2006.
4. S. Suthram, J. C. Ziegert, T. Nishida, and S. E. Thompson, "Piezoresistance coefficients of (100) silicon nMOSFETs measured at low and high (similar to 1.5 GPa) channel stress," IEEE Electron Dev. Lett., vol. 28, no. 1, pp. 58-61, Jan. 2007.
5. S. E. Thompson, G. Y. Sun, Y. S. Choi, and T. Nishida, "Uniaxialprocess-induced strained-Si: Extending the CMOS roadmap," IEEE Trans. Electron Dev., vol. 53, no. 5, pp. 1010-1020, May 2006.
6. Y. S. Choi, J. S. Lim, T. Numata, T. Nishida, and S. E. Thompson, "Mechanical stress altered electron gate tunneling current and extraction of conduction band deformation potentials for germanium," J. Appl. Phys., vol. 102, Nov. 2007, 104507.
7. J. S. Lim, X. Yang, T. Nishida, and S. E. Thompson, "Measurement of conduction band deformation potential constants using gate direct tunneling current in n-type metal oxide semiconductor field effect transistors under mechanical stress," Appl. Phys. Lett., vol. 89, p. 073509-3, Aug. 2006.
8. J. S. Lim, S. E. Thompson, and J. G. Fossum, "Comparison of threshold-voltage shifts for uniaxial and biaxial tensile-stressed n-MOSFETs," IEEE Electron Dev. Lett., vol. 25, no. 11, pp. 731-733, Nov. 2004.
9. S. E. Thompson, G. Sun, K. Wu, J. Lim, and T. Nishida, "Key differences for process-induced uniaxial vs. substrate-induced biaxial stressed Si and Ge channel MOSFETs," in Proc. IEDM Tech. Dig., 2004, pp. 221-224.
10. K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C.-H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hattendorf, J. He, J. Hicks, R. Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pae, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Shifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. T. Roeger, P. Vandervoorn, S. Williams, and K. Zawadzki, "A 45 nm logic technology with high-k+metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging," in Proc. IEDM Tech. Dig., 2007, pp. 247-250.
11. 2-based nMOSFETs," IEEE Trans. Nucl. Sci., vol. 54, no. 6, pp. 1883-1890, Dec. 2007.
12. J. A. Felix, J. R. Schwank, D. M. Fleetwood, M. R. Shaneyfelt, and E. P. Gusev, "Effects of radiation and charge trapping on the reliability of high-k gate dielectrics," Microelectron. Reliab., vol. 44, pp. 563-575, Jan. 2004.
13. T. R. Oldham and F. B. McLean, "Total ionizing dose effects in MOS oxides and devices," IEEE Trans. Nucl. Sci., vol. 50, no. 3, pp. 483-499, Jun. 2003.
14. K. Kasama, F. Toyokawa,M. Tsukiji, M. Sakamoto, and K. Kobayashi, "Mechanical-stress dependence of radiation effects in MOS structures," IEEE Trans. Nucl. Sci., vol. 33, no. 6, pp. 1210-1215, Dec. 1986.
15. 2 - Si devices," Appl. Phys. Lett., vol. 45, pp. 249-251, Aug. 1984.
16. S. Saito, D. Hisamoto, S. Kimura, and M. Hiratani, "Unified mobility model for high-k gate stacks MISFETs," in Proc. IEDM Tech. Dig., 2003, pp. 33.3.1-33.3.4.
17. A. Ortiz-Conde, F. J. Garcia Sanchez, J. J. Liou, A. Cerdeira, M. Estrada, and Y. Yue, "A review of recent MOSFET threshold voltage extraction methods," Microelectron. Reliab., vol. 42, pp. 583-596, Feb. 2002.
18. C. D. Young, D. Heh, S. V. Nadkarni, R. Choi, J. J. Peterson, J. Barnett, B. H. Lee, and G. Bersuker, "Electron trap generation in high-k gate stacks by constant voltage stress," IEEE Trans. Device Mater. Rel., vol. 6, no. 3, pp. 123-131, Jun. 2006.
19. Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices. Cambridge, U.K.: Cambridge Univ. Press, 1998.
20. 2 dual layer gate dielectrics," IEEE Electron Dev. Lett., vol. 24, no. 2, pp. 87-89, Feb. 2003.
21. 2 MOSFETs," IEEE Trans. Electron Dev., vol. 50, no. 6, pp. 1517-1524, Jun. 2003.
22. 2 dielectrics n-MOSFETs," Microelectron. Reliab., vol. 45, pp. 1051-1060, Mar. 2005.
23. P. J. McWhorter and P. S. Winokur, "Simple technique for separating the effects of interface traps and trapped-oxide charge in metal- oxidesemiconductor transistors," Appl. Phys. Lett., vol. 48, pp. 133-135, Jan. 1986.
24. S. Y. Son, Y. S. Choi, P. Kumar, H. Park, T. Nishida, R. K. Singh, and S. E. Thompson, "Strained induced changes in gate leakage current and dielectric constant nitrided Hf-silicate dielectric silicon MOS capacitors," vol. 93, Oct. 2008, 153505.
25. Y. S. Choi, T. Nishida, and S. E. Thompson, "Impact of mechanical stress on direct and trap-assisted gate leakage currents in p-type silicon metal-oxide-semiconductor capacitors," Appl. Phys. Lett., vol. 92, May 2008, 173507.
26. A. Hamada and E. Takeda, "Hot-electron trapping activation energy in pMOSFETs under mechanical stress," IEEE Electron Dev. Lett., vol. 15, no. 1, pp. 31-32, Jan. 1994.
27. E. Takeda, "A cross-section of VLSI reliability - Hot Carriers, dielectrics and metallization," Semicond. Sci. Tech., vol. 9, pp. 971-987, May 1994.
28. D. M. Fleetwood, H. D. Xiong, Z. Y. Lu, C. J. Nicklaw, J. A. Felix, R. D. Schrimpf, and S. T. Pantelides, "Unified model of hole trapping, 1/f noise, and thermally stimulated current in MOS devices," IEEE Trans. Nucl. Sci., vol. 49, no. 6, pp. 2674-2683, Dec. 2002.
29. 2," Phys. Rev. Lett., vol. 89, p. 285505, Dec. 2002.
30. 2," IEEE Trans. Nucl. Sci., vol. 49, no. 6, pp. 2667-2673, Dec. 2002.
31. X. J. Zhou, D. M. Fleetwood, I. Danciu, A. Dasgupta, S. A. Francis, and A. D. Touboul, "Effects of aging on the 1/f noise of metal- oxidesemiconductor field effect transistors," Appl. Phys. Lett., vol. 91, Oct. 2007, 173501.
32. 2," J. Appl. Phys., vol. 48, pp. 3819-3828, Sep. 1977.
33. T. P. Ma and P. V. Dressendorfer, Ionizing Radiation Effects in MOS Devices and Circuits. Hoboken, NJ: Wiley, 1989.
34. 2 films at low temperatures," IEEE Trans. Nucl. Sci., vol. 23, no. 6, pp. 1513-1519, Dec. 1976.