Rapid design of area-efficient custom instructions for reconfigurable embedded processing

Journal of Systems Architecture

Volumn 55, Issue 1, 2009, Pages 1-14

  Lam, Siew Kei ^a   Srikanthan, Thambipillai ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Area estimation; Design exploration; FPGA; Look up table; Reconfigurable logic

Indexed keywords

BENCHMARKING; DESIGN; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PROGRAM PROCESSORS; TABLE LOOKUP;

AREA ESTIMATION; DESIGN EXPLORATION; FPGA; LOOK-UP TABLE; RECONFIGURABLE LOGIC;

PROCESS ENGINEERING;

EID: 56549096013     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2008.06.003     Document Type: Article

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