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Volumn , Issue , 2004, Pages 129-132

An area estimation methodology for FPGA based designs at systemC-level

Author keywords

Area metrics; FPGAs; SystemC

Indexed keywords

ALGORITHMS; BENCHMARKING; ENCODING (SYMBOLS); INFORMATION ANALYSIS; METRIC SYSTEM; PARAMETER ESTIMATION; STATISTICAL METHODS; TUNING;

EID: 4444254091     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996606     Document Type: Conference Paper
Times cited : (45)

References (12)
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  • 6
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    • Nayak, A.1
  • 7
    • 77956055108 scopus 로고    scopus 로고
    • Area time power estimation for FPGA based design at behavioral level
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    • (2000) Proc. of ICECS , pp. 524-527
    • Bilavarn, P.1
  • 8
    • 0036949720 scopus 로고    scopus 로고
    • Controller estimation for FPGA target architectures during high-level synthesis
    • C. Menn et al, "Controller Estimation for FPGA Target Architectures During High-Level Synthesis," Proc. of ISSS, pp. 56-61, 2002.
    • (2002) Proc. of ISSS , pp. 56-61
    • Menn, C.1
  • 9
    • 0029771169 scopus 로고    scopus 로고
    • Area and timing estimation for look-up table based FPGAs
    • F.J. Kurdahi and M. Xu, "Area and Timing Estimation for Look-up Table Based FPGAs," Proc. of DATE, pp. 151-157, 1996.
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    • Kurdahi, F.J.1    Xu, M.2
  • 10
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    • Fast area estimation to support compiler optimizations in FPGA-based reconfigurable systems
    • D. Kulkarni et al., "Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems," Proc. of FPCCM, pp. 239-247, 2002.
    • (2002) Proc. of FPCCM , pp. 239-247
    • Kulkarni, D.1
  • 11
    • 0036862631 scopus 로고    scopus 로고
    • Static power modeling of 32-bit microprocessors
    • C. Brandolese et al, "Static power modeling of 32-bit microprocessors," Transactions on CAD, pp. 1306-1316, Vol. 21, 2002.
    • (2002) Transactions on CAD , vol.21 , pp. 1306-1316
    • Brandolese, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.