Accurate area and delay estimators for FPGAs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2002, Pages 862-869

  Nayak, Anshuman ^a   Haldar, Malay ^a   Choudhary, Alok ^b   Banerjee, Prith ^b  

^a AccelChip   (United States)

^b NORTHWESTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC DESIGN SPACE EXPLORATIONS; CONFIGURABLE LOGIC BLOCKS; FREQUENCY SPECIFICATIONS; HIGH LEVEL SYNTHESIS; HIGH-LEVEL SIGNALS; LOGIC SYNTHESIS TOOLS; MATLAB ALGORITHM; PLACEMENT AND ROUTING;

EXHIBITIONS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; IMAGE PROCESSING; MATLAB; PROGRAM COMPILERS;

ESTIMATION;

EID: 84893790504     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998400     Document Type: Conference Paper

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